/*******************************************************************************
 *
 * $Id: $
 * Copyright: (c) 2018 Broadcom. All Rights Reserved. "Broadcom" refers to 
 * Broadcom Limited and/or its subsidiaries.
 * 
 * Broadcom Switch Software License
 * 
 * This license governs the use of the accompanying Broadcom software. Your 
 * use of the software indicates your acceptance of the terms and conditions 
 * of this license. If you do not agree to the terms and conditions of this 
 * license, do not use the software.
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 *    grants to you a perpetual, worldwide, non-exclusive, and royalty-free 
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 *    intended for use, with a Broadcom switch integrated circuit.
 *    No Reverse Engineering. You will not use the Work to disassemble, 
 *    reverse engineer, decompile, or attempt to ascertain the underlying 
 *    technology of a Broadcom switch integrated circuit.
 * 8. Termination
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 *    license (including the license grants of Sections 2 and 3) will 
 *    terminate immediately.
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 * 10. Limitation of Liability
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 * 
 *
 * DO NOT EDIT THIS FILE!
 * This file is auto-generated from the registers file.
 * Edits to this file will be lost when it is regenerated.
 *
 * Symbol table file for the BCMI_TSCE_XGXS.
 * This symbol table is used by the Broadcom debug shell.
 */


#include <phymod/chip/bcmi_tsce_xgxs_defs.h>
#include <phymod/phymod_symbols.h>

/* No symbols will be compiled unless this is defined. */
#if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1
/*******************************************************************************
 *
 * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information
 * necessary to encode and decode the individual fields of a register or memory
 * will be available.
 *
 * Without it, only the register and memory names will be symbolically available
 * and their values will be displayed as raw data only. 
 *
 * Field information can be compiled out in the interest of saving code space.
 */
#if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS

static uint32_t BCMI_TSCE_XGXS_ACC_ADDR_DATAr_fields[] =
{
    /* MDIO_ADDR_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(875, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_ACC_CTLr_fields[] =
{
    /* MDIO_DEVAD:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(879, 4, 0),
    /* MDIO_FUNCTION:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(886, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL0r_fields[] =
{
    /* AMS_PLL_LOWPWR_6G:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(75, 0, 0),
    /* AMS_PLL_TXCG_VDDR_BGB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(95, 1, 1),
    /* AMS_PLL_IMIN_ICLKINT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(57, 2, 2),
    /* AMS_PLL_IMAX_ICLKINT:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(47, 3, 3),
    /* AMS_PLL_IMODE_ICLKINT:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(67, 4, 4),
    /* AMS_PLL_IMIN_ICKGEN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(55, 5, 5),
    /* AMS_PLL_IMAX_ICKGEN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(45, 6, 6),
    /* AMS_PLL_IMODE_ICKGEN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(65, 7, 7),
    /* AMS_PLL_IMIN_ICLKIDRV1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(56, 8, 8),
    /* AMS_PLL_IMAX_ICLKIDRV1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(46, 9, 9),
    /* AMS_PLL_IMODE_ICLKIDRV1:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(66, 10, 10),
    /* AMS_PLL_CAL_OFF:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(26, 11, 11),
    /* AMS_PLL_CAL_AUX:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(25, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL1r_fields[] =
{
    /* AMS_PLL_DBLR_CTRL:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(28, 1, 0),
    /* AMS_PLL_SPARE_18:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(87, 2, 2),
    /* AMS_PLL_FP3_RH:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(35, 3, 3),
    /* AMS_PLL_FP3_CTRL:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(34, 5, 4),
    /* AMS_PLL_VCO_DIV2:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(99, 6, 6),
    /* AMS_PLL_VCO_DIV4:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(100, 7, 7),
    /* AMS_PLL_VCOICTRL:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(98, 9, 8),
    /* AMS_PLL_VCO_IMAX:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(101, 10, 10),
    /* AMS_PLL_IVCO:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(73, 13, 11),
    /* AMS_PLL_RESET:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(85, 14, 14),
    /* AMS_PLL_ENABLE_FTUNE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(30, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL2r_fields[] =
{
    /* AMS_PLL_EN_HRZ:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(31, 0, 0),
    /* AMS_PLL_IQP:1:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(72, 4, 1),
    /* AMS_PLL_REFL_PLL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(84, 5, 5),
    /* AMS_PLL_REFH_PLL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(83, 6, 6),
    /* AMS_PLL_IMIN_IBIAS:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(53, 7, 7),
    /* AMS_PLL_IMODE_IBIAS:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(63, 8, 8),
    /* AMS_PLL_IMAX_IBIAS:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(43, 9, 9),
    /* AMS_PLL_IMIN_ICP:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(60, 10, 10),
    /* AMS_PLL_IMODE_ICP:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(70, 11, 11),
    /* AMS_PLL_IMAX_ICP:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(50, 12, 12),
    /* AMS_PLL_IMIN_ICK:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(54, 13, 13),
    /* AMS_PLL_IMODE_ICK:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(64, 14, 14),
    /* AMS_PLL_IMAX_ICK:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(44, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL3r_fields[] =
{
    /* AMS_PLL_IMIN_I10GBUF:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(52, 0, 0),
    /* AMS_PLL_IMODE_I10GBUF:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(62, 1, 1),
    /* AMS_PLL_IMAX_I10GBUF:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(42, 2, 2),
    /* AMS_PLL_IMIN_ICML:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(58, 3, 3),
    /* AMS_PLL_IMODE_ICML:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(68, 4, 4),
    /* AMS_PLL_IMAX_ICML:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(48, 5, 5),
    /* AMS_PLL_IMIN_ICOMP:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(59, 6, 6),
    /* AMS_PLL_IMODE_ICOMP:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(69, 7, 7),
    /* AMS_PLL_IMAX_ICOMP:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(49, 8, 8),
    /* AMS_PLL_IMIN_IOP:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(61, 9, 9),
    /* AMS_PLL_IMODE_IOP:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(71, 10, 10),
    /* AMS_PLL_IMAX_IOP:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(51, 11, 11),
    /* AMS_PLL_TEST_VREF:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(94, 12, 12),
    /* AMS_PLL_TEST_VC:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(93, 13, 13),
    /* AMS_PLL_TEST_PLL:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(90, 14, 14),
    /* AMS_PLL_TEST_RX:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(92, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL4r_fields[] =
{
    /* AMS_PLL_BGR_PTATADJ:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(24, 3, 0),
    /* AMS_PLL_BGR_CTATADJ:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(23, 7, 4),
    /* AMS_PLL_2RX_CLKBW:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(18, 9, 8),
    /* AMS_PLL_COMP_VTH:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(27, 10, 10),
    /* AMS_PLL_VDDR_BGB:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(102, 11, 11),
    /* AMS_PLL_KVH_FORCE:12:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(74, 13, 12),
    /* AMS_PLL_FORCE_KVH_BW:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(32, 14, 14),
    /* AMS_PLL_FORCE_RESCAL:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(33, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL5r_fields[] =
{
    /* AMS_PLL_MAX_TEST_PORT_AMPL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(76, 0, 0),
    /* AMS_PLL_BGIP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(22, 1, 1),
    /* AMS_PLL_BGINT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(21, 2, 2),
    /* AMS_PLL_VBYPASS:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(97, 3, 3),
    /* AMS_PLL_TEST_PNP:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(91, 5, 4),
    /* AMS_PLL_BGCALR_CTATADJ:6:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(19, 10, 6),
    /* AMS_PLL_BGCALR_PTATADJ:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(20, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL6r_fields[] =
{
    /* AMS_PLL_TEST_FRACN_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(89, 0, 0),
    /* AMS_PLL_PDF_SKEW_ENLARGE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(81, 1, 1),
    /* AMS_PLL_PDF_FD_SKEW:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(79, 2, 2),
    /* AMS_PLL_PDF_REF_SKEW:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(80, 3, 3),
    /* AMS_PLL_SPARE_100:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(86, 4, 4),
    /* AMS_PLL_REFCLK_DOUBLER:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(82, 5, 5),
    /* AMS_PLL_MIX2P1CR_CTATADJ:6:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(77, 10, 6),
    /* AMS_PLL_MIX2P1CR_PTATADJ:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(78, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL7r_fields[] =
{
    /* AMS_PLL_FRACN_DIV_L:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(39, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AMS_CTL8r_fields[] =
{
    /* AMS_PLL_FRACN_DIV_H:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(38, 1, 0),
    /* AMS_PLL_FRACN_DIVRANGE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(37, 2, 2),
    /* AMS_PLL_FRACN_BYPASS:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(36, 3, 3),
    /* AMS_PLL_FRACN_NDIV_INT:4:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(40, 13, 4),
    /* AMS_PLL_DITHEREN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(29, 14, 14),
    /* AMS_PLL_FRACN_SEL:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(41, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_INTCTLr_fields[] =
{
    /* AMS_PLL_TX_LOWPWR_6G:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(96, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_AMS_RX_CTL0r_fields[] =
{
    /* AMS_RX_SEL_DFECKDELAY:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(150, 1, 0),
    /* AMS_RX_PHASE_INT_AMPL_CTRL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(148, 2, 2),
    /* AMS_RX_SIGDET_THRESHOLD:3:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(155, 5, 3),
    /* AMS_RX_SIG_PWRDN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(156, 6, 6),
    /* AMS_RX_VGA_OUTPUT_IDLE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(167, 7, 7),
    /* AMS_RX_TPORT_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(165, 8, 8),
    /* AMS_RX_SIGDET_BYPASS:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(153, 9, 9),
    /* AMS_RX_SIGDET_LOW_POWER:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(154, 10, 10),
    /* AMS_RX_VGA_BW_EXTENSION:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(166, 11, 11),
    /* AMS_RX_DC_COUPLE:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(103, 12, 12),
    /* AMS_RX_EN_10GMODE:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(107, 13, 13),
    /* AMS_RX_IMIN_COMMONMODE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(124, 14, 14),
    /* AMS_RX_IMOD_COMMONMODE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(147, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_RX_CTL1r_fields[] =
{
    /* AMS_RX_IMAX_COMMONMODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(112, 0, 0),
    /* AMS_RX_IMIN_PHASE_INT:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(131, 1, 1),
    /* AMS_RX_IMODE_PHASE_INT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(142, 2, 2),
    /* AMS_RX_IMAX_PHASE_INT:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(119, 3, 3),
    /* AMS_RX_IMIN_VGA:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(135, 4, 4),
    /* AMS_RX_IMODE_VGA:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(146, 5, 5),
    /* AMS_RX_IMAX_VGA:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(123, 6, 6),
    /* AMS_RX_IMIN_DFE_SUMMER:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(127, 7, 7),
    /* AMS_RX_IMODE_DFE_SUMMER:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(138, 8, 8),
    /* AMS_RX_IMAX_DFE_SUMMER:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(115, 9, 9),
    /* AMS_RX_IMIN_PF:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(130, 10, 10),
    /* AMS_RX_IMODE_PF:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(141, 11, 11),
    /* AMS_RX_IMAX_PF:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(118, 12, 12),
    /* AMS_RX_IMIN_CTAT:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(125, 13, 13),
    /* AMS_RX_IMODE_CTAT:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(136, 14, 14),
    /* AMS_RX_IMAX_CTAT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(113, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_RX_CTL2r_fields[] =
{
    /* AMS_RX_SPARE_32:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(157, 0, 0),
    /* AMS_RX_SPARE_33:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(158, 1, 1),
    /* AMS_RX_SPARE_34:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(159, 2, 2),
    /* AMS_RX_IMIN_SLICER:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(134, 3, 3),
    /* AMS_RX_IMODE_SLICER:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(145, 4, 4),
    /* AMS_RX_IMAX_SLICER:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(122, 5, 5),
    /* AMS_RX_IMIN_DFE_TAP_WEIGHT:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(128, 6, 6),
    /* AMS_RX_IMODE_DFE_TAP_WEIGHT:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(139, 7, 7),
    /* AMS_RX_IMAX_DFE_TAP_WEIGHT:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(116, 8, 8),
    /* AMS_RX_SEL_UGBW:9:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(152, 10, 9),
    /* AMS_RX_SEL_TH4DFE:11:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(151, 12, 11),
    /* AMS_RX_EN_VCCTRL:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(108, 13, 13),
    /* AMS_RX_SPARE_46:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(160, 14, 14),
    /* AMS_RX_SPARE_47:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(161, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_RX_CTL3r_fields[] =
{
    /* AMS_RX_IMIN_DC_OFFSET_DAC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(126, 0, 0),
    /* AMS_RX_IMODE_DC_OFFSET_DAC:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(137, 1, 1),
    /* AMS_RX_IMAX_DC_OFFSET_DAC:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(114, 2, 2),
    /* AMS_RX_IMIN_PHASE_INT_P1:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(132, 3, 3),
    /* AMS_RX_IMODE_PHASE_INT_P1:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(143, 4, 4),
    /* AMS_RX_IMAX_PHASE_INT_P1:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(120, 5, 5),
    /* AMS_RX_IMIN_METRES_EYEDIAG:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(129, 6, 6),
    /* AMS_RX_IMODE_METRES_EYEDIAG:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(140, 7, 7),
    /* AMS_RX_IMAX_METRES_EYEDIAG:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(117, 8, 8),
    /* AMS_RX_IMIN_SIGNAL_DETECT:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(133, 9, 9),
    /* AMS_RX_IMODE_SIGNAL_DETECT:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(144, 10, 10),
    /* AMS_RX_IMAX_SIGNAL_DETECT:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(121, 11, 11),
    /* AMS_RX_I4DEADZONE:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(111, 12, 12),
    /* AMS_RX_I1P25DFE:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(110, 13, 13),
    /* AMS_RX_SPARE_62:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(162, 14, 14),
    /* AMS_RX_SPARE_63:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(163, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_RX_CTL4r_fields[] =
{
    /* AMS_RX_DC_OFFSET:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(104, 6, 0),
    /* AMS_RX_FORCE_DC_OFFSET:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(109, 7, 7),
    /* AMS_RX_DC_OFFSET_RANGE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(105, 8, 8),
    /* AMS_RX_VGA_RESCAL_MUX:9:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(168, 11, 9),
    /* AMS_RX_PHS_INTERP_RESCAL_MUX:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(149, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_AMS_RX_INTCTLr_fields[] =
{
    /* AMS_RX_DFE_OS2X_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(106, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_AMS_RX_STSr_fields[] =
{
    /* AMS_RX_STS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(164, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AMS_STSr_fields[] =
{
    /* AMS_PLL_STS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(88, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AMS_TX_CTL0r_fields[] =
{
    /* AMS_TX_OSR4:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(181, 0, 0),
    /* AMS_TX_SPARE_1:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(187, 1, 1),
    /* AMS_TX_SPARE_2:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(188, 2, 2),
    /* AMS_TX_SPARE_3:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(189, 3, 3),
    /* AMS_TX_TEST_DATA:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(192, 5, 4),
    /* AMS_TX_TICKSEL:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(193, 7, 6),
    /* AMS_TX_KR_TEST_MODE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(179, 8, 8),
    /* AMS_TX_DCC_SEL:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(173, 9, 9),
    /* AMS_TX_DCC_DIS:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(172, 10, 10),
    /* AMS_TX_CAL_OFF:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(171, 11, 11),
    /* AMS_TX_CAL_AUX:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(170, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_AMS_TX_CTL1r_fields[] =
{
    /* AMS_TX_IBIAS:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(176, 2, 0),
    /* AMS_TX_IDCC:3:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(178, 5, 3),
    /* AMS_TX_ICML:6:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(177, 8, 6),
    /* AMS_TX_SPARE_30_25:9:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(190, 14, 9),
    /* AMS_TX_LP_OVRD:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(180, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_TX_CTL2r_fields[] =
{
    /* AMS_TX_AMP_CTL:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(169, 3, 0),
    /* AMS_TX_POST3_COEF:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(183, 6, 4),
    /* AMS_TX_SIGN_POST3:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(186, 7, 7),
    /* AMS_TX_POST2_COEF:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(182, 11, 8),
    /* AMS_TX_SIGN_POST2:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(185, 12, 12),
    /* AMS_TX_DRIVERMODE:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(174, 14, 13),
    /* AMS_TX_ELEC_IDLE_AUX:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(175, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AMS_TX_INTCTLr_fields[] =
{
    /* AMS_TX_SEL_HALFRATE:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(184, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_AMS_TX_STSr_fields[] =
{
    /* AMS_TX_STS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(191, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_11_6r_fields[] =
{
    /* AN_PRIORITY_10GCX4:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(222, 1, 0),
    /* AN_PRIORITY_10GCX1:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(220, 3, 2),
    /* AN_PRIORITY_6GX4:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(252, 5, 4),
    /* AN_PRIORITY_10GX4:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(226, 7, 6),
    /* AN_PRIORITY_10GKX4:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(224, 9, 8),
    /* AN_PRIORITY_10GKR:10:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(223, 11, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_17_12r_fields[] =
{
    /* AN_PRIORITY_10P5GX2:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(228, 1, 0),
    /* AN_PRIORITY_10GX2:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(225, 3, 2),
    /* AN_PRIORITY_10GCX2:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(221, 5, 4),
    /* AN_PRIORITY_12P7GX2:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(231, 7, 6),
    /* AN_PRIORITY_12P5GX4:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(230, 9, 8),
    /* AN_PRIORITY_12GX4:10:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(229, 11, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_23_18r_fields[] =
{
    /* AN_PRIORITY_15P75GX2:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(234, 1, 0),
    /* AN_PRIORITY_15GX4:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(233, 3, 2),
    /* AN_PRIORITY_13GX4:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(232, 5, 4),
    /* AN_PRIORITY_100GCR10:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(218, 7, 6),
    /* AN_PRIORITY_40GKR4:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(249, 9, 8),
    /* AN_PRIORITY_40GCR4:10:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(248, 11, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_29_24r_fields[] =
{
    /* AN_PRIORITY_20GCR2:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(237, 1, 0),
    /* AN_PRIORITY_20GCX2:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(238, 3, 2),
    /* AN_PRIORITY_16GX4:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(235, 5, 4),
    /* AN_PRIORITY_20GX2:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(241, 7, 6),
    /* AN_PRIORITY_20GCX4:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(239, 9, 8),
    /* AN_PRIORITY_20GKR2:10:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(240, 11, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_35_30r_fields[] =
{
    /* AN_PRIORITY_25P45GX4:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(244, 1, 0),
    /* AN_PRIORITY_21GX4:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(243, 3, 2),
    /* AN_PRIORITY_20GX4:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(242, 5, 4),
    /* AN_PRIORITY_40GX4:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(250, 7, 6),
    /* AN_PRIORITY_32P7G:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(247, 9, 8),
    /* AN_PRIORITY_31P5G:10:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(246, 11, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_5_0r_fields[] =
{
    /* AN_PRIORITY_1000M:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(217, 1, 0),
    /* AN_PRIORITY_100M:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(219, 3, 2),
    /* AN_PRIORITY_10M:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(227, 5, 4),
    /* AN_PRIORITY_5GX4:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(251, 7, 6),
    /* AN_PRIORITY_2P5GX1:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(245, 9, 8),
    /* AN_PRIORITY_1GKX:10:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(236, 11, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CFG_CTLr_fields[] =
{
    /* AN_PD_TO_CL37_RETRY_COUNT:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(216, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CL37_ACKr_fields[] =
{
    /* CL37_ACK_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(403, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CL37_ERRr_fields[] =
{
    /* CL37_ERROR_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(410, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CL37_RESTARTr_fields[] =
{
    /* CL37_RESTART_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(416, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CL37_SYNC_STS_FILTER_TMRr_fields[] =
{
    /* CL37_SYNC_STATUS_FILTER_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(419, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CL73_BRK_LNKr_fields[] =
{
    /* TX_DISABLE_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1355, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CL73_DME_LOCKr_fields[] =
{
    /* PD_DME_LOCK_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1003, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_CL73_ERRr_fields[] =
{
    /* CL73_ERROR_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(519, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_DME_PAGE_TMRr_fields[] =
{
    /* CL73_PAGE_TEST_MIN_TIMER:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(526, 6, 0),
    /* CL73_PAGE_TEST_MAX_TIMER:7:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(525, 13, 7)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_IGNORE_LNK_TMRr_fields[] =
{
    /* IGNORE_LINK_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(768, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields[] =
{
    /* LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(808, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields[] =
{
    /* LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(809, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_LNK_UPr_fields[] =
{
    /* CL73_LINK_UP_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(521, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_OUI_LWRr_fields[] =
{
    /* OUI_LOWER_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(963, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_OUI_UPRr_fields[] =
{
    /* OUI_UPPER_DATA:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(964, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_PD_SD_TMRr_fields[] =
{
    /* PD_SD_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1008, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr_fields[] =
{
    /* PD_TO_CL37_LINK_WAIT_TIMER:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1009, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X1_SGMII_CL73_TMR_TYPEr_fields[] =
{
    /* SGMII_TIMER:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1237, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr_fields[] =
{
    /* AN_HCD_SWITCH_TO_CL37:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(214, 0, 0),
    /* AN_HCD_HIGIG2:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(211, 1, 1),
    /* AN_HCD_CL72:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(208, 2, 2),
    /* AN_HCD_FEC:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(210, 3, 3),
    /* AN_HCD_SPEED:4:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(213, 11, 4),
    /* AN_HCD_PAUSE:12:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(212, 13, 12),
    /* AN_HCD_DUPLEX:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(209, 14, 14),
    /* AN_ST_RESOLUTION_ERR:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(282, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_AN_MISC_STSr_fields[] =
{
    /* PD_HCD_KX4_OR_KX:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1004, 0, 0),
    /* PD_IN_PROGRESS:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1005, 1, 1),
    /* AN_FAIL_COUNT:2:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(204, 5, 2),
    /* AN_ACTIVE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(201, 6, 6),
    /* PD_COMPLETED:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1002, 7, 7),
    /* REMOTE_FAULT_IN_BASE_PAGE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1108, 8, 8),
    /* AN_RETRY_COUNT:9:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(253, 14, 9),
    /* AN_COMPLETE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(202, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_AN_PAGE_DECR_STSr_fields[] =
{
    /* AN_RX_ST_STATE:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(265, 1, 0),
    /* AN_RX_ST_RUDI_INVALID:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(264, 2, 2),
    /* AN_RX_ST_RUDI_CONFIG:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(262, 3, 3),
    /* AN_RX_ST_RUDI_IDLE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(263, 4, 4),
    /* AN_RX_ST_PAGE:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(256, 5, 5),
    /* AN_RX_ST_MV_PAIR:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(255, 6, 6),
    /* AN_RX_ST_CLK_TRANS_MISS:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(254, 7, 7),
    /* AN_RX_ST_PAGE_TOO_LONG:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(257, 8, 8),
    /* AN_RX_ST_PAGE_TOO_SHORT:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(258, 9, 9),
    /* AN_RX_ST_PULSE_TOO_LONG:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(259, 10, 10),
    /* AN_RX_ST_PULSE_TOO_SHORT:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(261, 11, 11),
    /* AN_RX_ST_PULSE_TOO_MODERATE:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(260, 12, 12)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_AN_PAGE_EXCHANGEER_STSr_fields[] =
{
    /* AN_ST_CONFIG_RESTART:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(274, 0, 0),
    /* AN_ST_IDLE_DETECT:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(279, 1, 1),
    /* AN_ST_DISABLE_LINK:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(276, 2, 2),
    /* AN_ST_ERROR_STATE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(277, 3, 3),
    /* AN_ST_AN_ENABLE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(268, 4, 4),
    /* AN_ST_ABILITY_DETECT:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(266, 5, 5),
    /* AN_ST_ACK_DETECT:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(267, 6, 6),
    /* AN_ST_COMPLETE_ACK:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(272, 7, 7),
    /* AN_ST_CONSISTENCY_MISMATCH:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(275, 8, 8),
    /* AN_ST_CONFIG_NONZERO:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(273, 9, 9),
    /* AN_ST_RESTART:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(283, 10, 10),
    /* AN_ST_AN_GOOD_CHECK:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(269, 11, 11),
    /* AN_ST_LINK_OK:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(280, 12, 12),
    /* AN_ST_NEXT_PAGE_WAIT:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(281, 13, 13)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_AN_PAGE_SEQUENCER_STSr_fields[] =
{
    /* AN_ST_CL73_COMPLETE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(271, 0, 0),
    /* AN_ST_CL37_COMPLETE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(270, 1, 1),
    /* AN_ST_RX_NP_TOGGLE_ERR:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(291, 2, 2),
    /* AN_ST_RX_INVALID_SEQ:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(285, 3, 3),
    /* AN_ST_RX_UP_OUI_MATCH:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(294, 4, 4),
    /* AN_ST_RX_UP_OUI_MISMATCH:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(295, 5, 5),
    /* AN_ST_RX_UP_3:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(293, 6, 6),
    /* AN_ST_RX_MP_MISMATCH:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(286, 7, 7),
    /* AN_ST_RX_MP_OVER1G:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(289, 8, 8),
    /* AN_ST_RX_MP_OUI:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(288, 9, 9),
    /* AN_ST_RX_MP_NULL:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(287, 10, 10),
    /* AN_ST_RX_NP:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(290, 11, 11),
    /* AN_ST_RX_BP:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(284, 12, 12),
    /* AN_ST_RX_SGMII_MISMATCH:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(292, 13, 13),
    /* AN_ST_HP_MODE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(278, 14, 14),
    /* AN_ST_SGMII_MODE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(296, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_AN_SEQ_UNEXPECTED_PAGEr_fields[] =
{
    /* SEQ_UNEXPECTED_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1229, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_CTLSr_fields[] =
{
    /* PD_KX4_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1006, 0, 0),
    /* PD_KX_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1007, 1, 1),
    /* AN_GOOD_TRAP:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(207, 2, 2),
    /* AN_GOOD_CHECK_TRAP:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(206, 3, 3),
    /* LINKFAILTIMER_DIS:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(805, 4, 4),
    /* LINKFAILTIMERQUAL_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(804, 5, 5),
    /* AN_FAIL_COUNT_LIMIT:6:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(205, 9, 6),
    /* OUI_CONTROL:10:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 15, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_ENSr_fields[] =
{
    /* CL73_AN_RESTART:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(514, 0, 0),
    /* CL37_AN_RESTART:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(404, 1, 1),
    /* HPAM_TO_CL73_AUTO_ENABLE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(764, 2, 2),
    /* CL73_BAM_TO_HPAM_AUTO_ENABLE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(517, 3, 3),
    /* SGMII_TO_CL37_AUTO_ENABLE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1238, 4, 4),
    /* CL37_BAM_TO_SGMII_AUTO_ENABLE:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(408, 5, 5),
    /* CL37_ENABLE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(409, 6, 6),
    /* CL37_SGMII_ENABLE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(417, 7, 7),
    /* CL73_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(518, 8, 8),
    /* CL73_HPAM_ENABLE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(520, 9, 9),
    /* CL73_BAM_ENABLE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(516, 10, 10),
    /* CL37_BAM_ENABLE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(407, 11, 11),
    /* NUM_ADVERTISED_LANES:12:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(948, 13, 12)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LD_CTLr_fields[] =
{
    /* SW_HCD:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1267, 0, 0),
    /* SW_AN:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1266, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LD_PAGE0r_fields[] =
{
    /* LD_PAGE_0_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(801, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LD_PAGE1r_fields[] =
{
    /* LD_PAGE_1_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(802, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LD_PAGE2r_fields[] =
{
    /* LD_PAGE_2_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(803, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL37_BAM_ABILr_fields[] =
{
    /* OVER1G_PAGE_COUNT:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(966, 1, 0),
    /* OVER1G_ABILITY:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(965, 2, 2),
    /* CL37_BAM_CODE:3:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(406, 11, 3)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL37_BASE_ABILr_fields[] =
{
    /* SGMII_SPEED:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1236, 1, 0),
    /* SGMII_FULL_DUPLEX:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1232, 2, 2),
    /* CL37_FULL_DUPLEX:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(411, 4, 4),
    /* CL37_HALF_DUPLEX:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(412, 5, 5),
    /* CL37_PAUSE:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(415, 7, 6),
    /* CL37_NEXT_PAGE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(414, 8, 8),
    /* SGMII_MASTER_MODE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1233, 9, 9),
    /* AN_PD_TO_CL37_ENABLE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(215, 10, 10),
    /* CL37_AN_RESTART_RESET_DISABLE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(405, 11, 11),
    /* CL37_SW_RESTART_RESET_DISABLE:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(418, 12, 12)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BAM_ABILr_fields[] =
{
    /* BAM_20GBASE_KR2:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(319, 0, 0),
    /* BAM_20GBASE_CR2:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(318, 1, 1),
    /* CL73_BAM_CODE:2:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(515, 10, 2),
    /* HPAM_20GKR2:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(763, 11, 11)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL0r_fields[] =
{
    /* BASE_100GBASE_CR10:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(333, 0, 0),
    /* BASE_40GBASE_CR4:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(336, 1, 1),
    /* BASE_40GBASE_KR4:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(337, 2, 2),
    /* BASE_10GBASE_KR:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(334, 3, 3),
    /* BASE_10GBASE_KX4:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(335, 4, 4),
    /* BASE_1000BASE_KX:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(332, 5, 5),
    /* CL73_PAUSE:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(527, 7, 6),
    /* FEC:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(735, 9, 8),
    /* NEXT_PAGE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(946, 10, 10),
    /* CL73_REMOTE_FAULT:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(528, 11, 11)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL1r_fields[] =
{
    /* BASE_SELECTOR:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(338, 4, 0),
    /* TRANSMIT_NONCE:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1295, 9, 5),
    /* CL73_NONCE_MATCH_VAL:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(524, 10, 10),
    /* CL73_NONCE_MATCH_OVER:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(523, 11, 11)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL0r_fields[] =
{
    /* BAM_2P5GBASE_X:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(326, 0, 0),
    /* BAM_5GBASE_X4:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(330, 1, 1),
    /* BAM_6GBASE_X4:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(331, 2, 2),
    /* BAM_10GBASE_X4:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(308, 3, 3),
    /* BAM_10GBASE_X4_CX4:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(309, 4, 4),
    /* BAM_10GBASE_X2:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(306, 5, 5),
    /* BAM_10GBASE_X2_CX4:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(307, 6, 6),
    /* BAM_10P5GBASE_X2:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(310, 7, 7),
    /* BAM_12GBASE_X4:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(311, 8, 8),
    /* BAM_12P5GBASE_X4:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(312, 9, 9),
    /* BAM_12P7GBASE_X2:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(313, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL1r_fields[] =
{
    /* BAM_13GBASE_X4:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(314, 0, 0),
    /* BAM_15GBASE_X4:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(315, 1, 1),
    /* BAM_15P75GBASE_X2:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(316, 2, 2),
    /* BAM_16GBASE_X4:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(317, 3, 3),
    /* BAM_20GBASE_X4_CX4:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(323, 4, 4),
    /* BAM_20GBASE_X4:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(322, 5, 5),
    /* BAM_20GBASE_X2:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(320, 6, 6),
    /* BAM_20GBASE_X2_CX4:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(321, 7, 7),
    /* BAM_21GBASE_X4:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(324, 8, 8),
    /* BAM_25P455GBASE_X4:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(325, 9, 9),
    /* BAM_31P5GBASE_X4:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(327, 10, 10),
    /* BAM_32P7GBASE_X4:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(328, 11, 11),
    /* BAM_40GBASE_X4:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(329, 12, 12),
    /* CL72:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(465, 13, 13),
    /* FEC:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(735, 14, 14),
    /* HG2:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(754, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE1r_fields[] =
{
    /* LP_BASE_PAGE1_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(849, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE2r_fields[] =
{
    /* LP_BASE_PAGE2_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(850, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE3r_fields[] =
{
    /* LP_BASE_PAGE3_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(851, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP1r_fields[] =
{
    /* LP_MP1024_UP1_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(852, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP2r_fields[] =
{
    /* LP_MP1024_UP2_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(853, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP3r_fields[] =
{
    /* LP_MP1024_UP3_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(854, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP4r_fields[] =
{
    /* LP_MP1024_UP4_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(855, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP1r_fields[] =
{
    /* LP_MP5_UP1_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(856, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP2r_fields[] =
{
    /* LP_MP5_UP2_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(857, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP3r_fields[] =
{
    /* LP_MP5_UP3_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(858, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP4r_fields[] =
{
    /* LP_MP5_UP4_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(859, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_PAGE0r_fields[] =
{
    /* LP_PAGE_0_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(860, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_PAGE1r_fields[] =
{
    /* LP_PAGE_1_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(861, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_LP_PAGE2r_fields[] =
{
    /* LP_PAGE_2_PAGE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(862, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_SW_CTL_STSr_fields[] =
{
    /* TLA_LN_SEQUENCER_FSM_STATUS1:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1294, 7, 0),
    /* PD_CL37_COMPLETED:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1001, 8, 8),
    /* LP_STATUS_VALID:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(863, 13, 13),
    /* LD_CONTROL_VALID:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(800, 14, 14),
    /* AN_COMPLETED_SW:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(203, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_AN_X4_TLA_SEQUENCER_STSr_fields[] =
{
    /* TLA_LN_SEQUENCER_FSM_STATUS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1293, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_CLK_N_RST_DBG_CTLr_fields[] =
{
    /* LN_RX_S_CLKGATE_FRC_ON:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(821, 0, 0),
    /* LN_RX_S_COMCLK_SEL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(823, 1, 1),
    /* LN_RX_S_COMCLK_FRC_ON:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(822, 2, 2),
    /* PMD_RX_CLK_VLD_FRC:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1056, 3, 3),
    /* PMD_RX_CLK_VLD_FRC_VAL:4:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1057, 4, 4)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] =
{
    /* AFE_RX_PWRDN_FRC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(2, 0, 0),
    /* AFE_RX_PWRDN_FRC_VAL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(3, 1, 1),
    /* AFE_RX_RESET_FRC:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(4, 2, 2),
    /* AFE_RX_RESET_FRC_VAL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(5, 3, 3),
    /* AFE_TX_PWRDN_FRC:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(12, 4, 4),
    /* AFE_TX_PWRDN_FRC_VAL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(13, 5, 5),
    /* AFE_TX_RESET_FRC:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(14, 6, 6),
    /* AFE_TX_RESET_FRC_VAL:7:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 7, 7)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_CLK_RST_N_PWRDWN_CTLr_fields[] =
{
    /* LN_DP_S_RSTB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(817, 1, 1),
    /* LN_RX_S_PWRDN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(824, 2, 2),
    /* LN_TX_S_PWRDN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(829, 3, 3),
    /* AFE_SIGDET_PWRDN:4:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(6, 4, 4)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_DBG_RST_CTLr_fields[] =
{
    /* LN_RX_S_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(825, 0, 0),
    /* LN_RX_DP_S_RSTB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(819, 1, 1),
    /* SIGDET_DP_RSTB_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1240, 2, 2),
    /* LN_TX_S_RSTB:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(830, 8, 8),
    /* LN_TX_DP_S_RSTB:9:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(827, 9, 9)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_DP_RST_ST_STSr_fields[] =
{
    /* LANE_DP_RESET_STATE:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(791, 2, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_MCST_MASK_CTLr_fields[] =
{
    /* LANE_MULTICAST_MASK_CONTROL:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(794, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] =
{
    /* PMD_LN_H_RSTB_PKILL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1050, 0, 0),
    /* PMD_LN_DP_H_RSTB_PKILL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1049, 1, 1),
    /* PMD_LN_RX_H_PWRDN_PKILL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1051, 2, 2),
    /* PMD_LN_TX_H_PWRDN_PKILL:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1052, 3, 3)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_RST_OCC_CTLr_fields[] =
{
    /* LANE_REG_RESET_OCCURRED:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(795, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_LN_S_RSTB_CTLr_fields[] =
{
    /* LN_S_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(826, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_OSR_MODE_CTLr_fields[] =
{
    /* OSR_MODE_FRC_VAL:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(956, 3, 0),
    /* OSR_MODE_FRC:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(955, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_OSR_MODE_PIN_STSr_fields[] =
{
    /* OSR_MODE_PIN:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(958, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_OSR_MODE_STSr_fields[] =
{
    /* OSR_MODE:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(954, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_PMD_LN_MODE_STSr_fields[] =
{
    /* PMD_LANE_MODE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1048, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CKRST_UC_ACK_LN_CTLr_fields[] =
{
    /* UC_ACK_LANE_CFG_DONE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1420, 0, 0),
    /* UC_ACK_LANE_DP_RESET:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1421, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_CL72_LNK_CTLr_fields[] =
{
    /* LINK_CONTROL_FORCEVAL:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(806, 14, 14)
};
static uint32_t BCMI_TSCE_XGXS_CL72_RXBASE_R_LD_STS_REPr_fields[] =
{
    /* CL72_IEEE_LP_STATUS_REPORT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(483, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_RXCL72_LP_CTL_PAGEr_fields[] =
{
    /* CL72_LP_CONTROL_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(494, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_RXCL72_STS1r_fields[] =
{
    /* CL72_SIGNAL_DETECT:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(501, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_RXDBG2r_fields[] =
{
    /* CL72_GOOD_MARKER_CNT:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(478, 1, 0),
    /* CL72_BAD_MARKER_CNT:2:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(466, 4, 2),
    /* CL72_DME_CELL_BOUNDARY_CHK:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(471, 7, 7),
    /* CL72_CTRL_FRAME_DLY:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(468, 11, 8),
    /* CL72_STRICT_DME_CHK:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(503, 12, 12),
    /* CL72_STRICT_MARKER_CHK:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(504, 13, 13),
    /* CL72_PPM_OFFSET_EN:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(496, 14, 14)
};
static uint32_t BCMI_TSCE_XGXS_CL72_RXMISC1_CTLr_fields[] =
{
    /* CL72_TR_COARSE_LOCK:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(507, 1, 1),
    /* CL72_RX_DP_LN_CLK_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(499, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_CL72_RXRCVD_STSr_fields[] =
{
    /* CL72_RCVD_STATUS_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(497, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXBASE_R_LD_COEFF_UPDr_fields[] =
{
    /* CL72_IEEE_LD_COEFF_UPDATE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(480, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXBASE_R_LD_STS_REPr_fields[] =
{
    /* CL72_IEEE_LD_STATUS_REPORT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(481, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXBASE_R_LP_COEFF_UPDr_fields[] =
{
    /* CL72_IEEE_LP_COEFF_UPDATE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(482, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXBASE_R_PMD_CTLr_fields[] =
{
    /* CL72_IEEE_RESTART_TRAINING:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(485, 0, 0),
    /* CL72_IEEE_TRAINING_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(486, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXBASE_R_PMD_STSr_fields[] =
{
    /* CL72_IEEE_RECEIVER_STATUS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(484, 0, 0),
    /* CL72_IEEE_FRAME_LOCK:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(479, 1, 1),
    /* CL72_IEEE_TRAINING_STATUS:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(488, 2, 2),
    /* CL72_IEEE_TRAINING_FAILURE:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(487, 3, 3)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXCL72_LD_STS_PAGEr_fields[] =
{
    /* CL72_LD_STATUS_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(491, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr_fields[] =
{
    /* CL72_OVERRIDE_LD_STATUS_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(495, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXCL72_READY_FOR_CMDr_fields[] =
{
    /* CL72_READY_FOR_CMD:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(498, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXCL72_TX_DBG_STSr_fields[] =
{
    /* CL72_LD_COEFF_CMD_HIST:0:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 0),
    /* CL72_FRAME_LOCK_LH:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(476, 11, 11)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXC_DBG1r_fields[] =
{
    /* MAIN_TAP_MIN_VAL:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(872, 6, 0),
    /* TAP_SUM_MAX_VAL:7:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1280, 14, 7)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXC_MAX_WAIT_TMRr_fields[] =
{
    /* MAX_WAIT_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(874, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXC_TAP_LIMIT_CTL1r_fields[] =
{
    /* PRE_TAP_LIMIT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1088, 4, 0),
    /* POST_TAP_LIMIT:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1065, 10, 5)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXC_TAP_LIMIT_CTL2r_fields[] =
{
    /* MAIN_TAP_LIMIT:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(871, 6, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXC_TAP_PRESET_CTLr_fields[] =
{
    /* POST_TAP_PRESET_VAL:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1066, 5, 0),
    /* PRE_TAP_PRESET_VAL:6:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1089, 10, 6)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXC_WAIT_TMRr_fields[] =
{
    /* WAIT_CNTR_LIMIT:0:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1453, 8, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXDBG3r_fields[] =
{
    /* CL72_BRK_RING_OSC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(467, 0, 0),
    /* CL72_FRAME_LOCK_RDY_FOR_CMD_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(477, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXKR_DFLT_CTL1r_fields[] =
{
    /* CL72_TX_FIR_TAP_PRE_KR_INIT_VAL:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(511, 4, 0),
    /* CL72_TX_FIR_TAP_POST_KR_INIT_VAL:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(510, 10, 5)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXKR_DFLT_CTL2r_fields[] =
{
    /* CL72_TX_FIR_TAP_MAIN_KR_INIT_VAL:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(509, 6, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXMISC2_CTLr_fields[] =
{
    /* CL72_RX_TRAINED:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(500, 0, 0),
    /* CL72_SIGNAL_DET_FRC:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(502, 1, 1),
    /* CL72_TX_DP_LN_CLK_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(508, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXMISC_COEFF_CTLr_fields[] =
{
    /* CL72_INC_DEC_VAL_SEL:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(489, 1, 0),
    /* CL72_TAP_V2_VAL:2:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(505, 7, 2),
    /* CL72_V2_CONSTRAINT_DIS:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(512, 8, 8),
    /* CL72_LD_XMT_STATUS_LOAD:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(492, 9, 9),
    /* CL72_LD_XMT_STATUS_OVERRIDE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(493, 10, 10),
    /* CL72_DIS_LP_COEFF_UPDATES_TO_LD:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(469, 11, 11),
    /* CL72_DOUBLE_CMD_EN:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(472, 12, 12)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXPCS_INTERFACE_CTLr_fields[] =
{
    /* CL72_DIS_MAX_WAIT_TIMER:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(470, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL72_TXXMT_UPDr_fields[] =
{
    /* CL72_XMT_UPDATE_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(513, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL82_BER_HO_STSr_fields[] =
{
    /* BER_HO:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(341, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL82_LANES_1_0_AM_BYTE2r_fields[] =
{
    /* LANE_0_AM_2:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(780, 7, 0),
    /* LANE_1_AM_2:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(782, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_CL82_LANES_3_2_AM_BYTE2r_fields[] =
{
    /* LANE_2_AM_2:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(784, 7, 0),
    /* LANE_3_AM_2:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(786, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_CL82_LN_0_AM_BYTE10r_fields[] =
{
    /* LANE_0_AM_1_0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(779, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL82_LN_1_AM_BYTE10r_fields[] =
{
    /* LANE_1_AM_1_0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(781, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL82_LN_2_AM_BYTE10r_fields[] =
{
    /* LANE_2_AM_1_0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(783, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL82_LN_3_AM_BYTE10r_fields[] =
{
    /* LANE_3_AM_1_0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(785, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL82_PCS_ERRED_BLKS_HOr_fields[] =
{
    /* ERRORED_BLOCKS_HO:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(722, 13, 0),
    /* ERRORED_BLOCKS_HO_PRESENT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(723, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_CL82_RX_AM_TMRr_fields[] =
{
    /* AM_TIMER_INIT_RX_VAL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(199, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_CL82_RX_DECR_STSr_fields[] =
{
    /* RXSM_STATE:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1170, 6, 0),
    /* R_TYPE_CODED:7:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1201, 12, 7)
};
static uint32_t BCMI_TSCE_XGXS_CL82_RX_DESKEW_BER_STSr_fields[] =
{
    /* BERMON_STATE:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(339, 4, 0),
    /* LBERMON_STATE:6:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(799, 10, 6),
    /* DESKEW_HIS_STATE:12:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(603, 13, 12),
    /* DESKEW_STATE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(604, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_DIG_CORE_DP_RST_ST_STSr_fields[] =
{
    /* CORE_DP_RESET_STATE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(562, 2, 0),
    /* LANE_RESET_RELEASED_INDEX:8:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(797, 12, 8),
    /* LANE_RESET_RELEASED:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(796, 14, 14)
};
static uint32_t BCMI_TSCE_XGXS_DIG_CORE_MCST_MASK_CTLr_fields[] =
{
    /* CORE_MULTICAST_MASK_CONTROL:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(566, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_DIG_CORE_RST_OCC_CTLr_fields[] =
{
    /* CORE_REG_RESET_OCCURRED:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(567, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_DIG_CTL1000X2r_fields[] =
{
    /* DISABLE_REMOTE_FAULT_REPORTING:4:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(687, 4, 4)
};
static uint32_t BCMI_TSCE_XGXS_DIG_LN_ADDR_2_3r_fields[] =
{
    /* LANE_ADDR_2:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(789, 4, 0),
    /* LANE_ADDR_3:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(790, 12, 8)
};
static uint32_t BCMI_TSCE_XGXS_DIG_PMD_CORE_MODE_STSr_fields[] =
{
    /* PMD_CORE_MODE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1047, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_DIG_REVID0r_fields[] =
{
    /* REVID_MODEL:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1134, 5, 0),
    /* REVID_PROCESS:6:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1137, 8, 6),
    /* REVID_BONDING:9:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1128, 10, 9),
    /* REVID_REV_NUMBER:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1139, 13, 11),
    /* REVID_REV_LETTER:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1138, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_DIG_REVID1r_fields[] =
{
    /* REVID_EEE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1130, 0, 0),
    /* REVID_LLP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1131, 1, 1),
    /* REVID_PIR:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1136, 2, 2),
    /* REVID_CL72:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1129, 3, 3),
    /* REVID_MICRO:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1133, 4, 4),
    /* REVID_MDIO:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1132, 5, 5),
    /* REVID_MULTIPLICITY:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1135, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_DIG_REVID2r_fields[] =
{
    /* REVID2:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1127, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_DIG_RST_CTL_CORE_DPr_fields[] =
{
    /* PMD_CORE_DP_H_RSTB_PKILL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1046, 1, 1),
    /* SUP_RST_SEQ_FRC_VAL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1265, 3, 3),
    /* SUP_RST_SEQ_FRC:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1264, 4, 4),
    /* PMD_MDIO_TRANS_PKILL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1055, 5, 5),
    /* PMD_TX_CLK_VLD_FRC:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1060, 7, 7),
    /* PMD_TX_CLK_VLD_FRC_VAL:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1061, 8, 8),
    /* TX_S_COMCLK_SEL:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1411, 9, 9),
    /* TX_S_COMCLK_FRC_ON:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1410, 10, 10),
    /* TX_S_CLKGATE_FRC_ON:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1409, 11, 11),
    /* AFE_S_PLL_RESET_FRC_VAL:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(11, 12, 12),
    /* AFE_S_PLL_RESET_FRC:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(10, 13, 13),
    /* TX_PI_LOOP_FILTER_STABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1390, 14, 14)
};
static uint32_t BCMI_TSCE_XGXS_DIG_RST_CTL_PMDr_fields[] =
{
    /* CORE_S_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(568, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_DIG_RST_SEQ_TMR_CTLr_fields[] =
{
    /* RST_SEQ_TIMER:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1163, 2, 0),
    /* PWRDN_SEQ_TIMER:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1096, 10, 8),
    /* RST_SEQ_DIS_FLT_MODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1162, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_DIG_SPARE0r_fields[] =
{
    /* SPARE0:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1259, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_DIG_SPARE1r_fields[] =
{
    /* SPARE1:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1260, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_DIG_TOP_USER_CTL0r_fields[] =
{
    /* HEARTBEAT_COUNT_1US:0:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(753, 9, 0),
    /* CORE_DP_S_RSTB:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(563, 13, 13),
    /* AFE_S_PLL_PWRDN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(9, 14, 14),
    /* UC_ACTIVE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1422, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DIG_TX_LN_MAP_0_1_2r_fields[] =
{
    /* TX_LANE_MAP_0:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1359, 4, 0),
    /* TX_LANE_MAP_1:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1360, 9, 5),
    /* TX_LANE_MAP_2:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1361, 14, 10)
};
static uint32_t BCMI_TSCE_XGXS_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r_fields[] =
{
    /* TX_LANE_MAP_3:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1362, 4, 0),
    /* LANE_ADDR_0:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(787, 9, 5),
    /* LANE_ADDR_1:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(788, 14, 10)
};
static uint32_t BCMI_TSCE_XGXS_DIG_UC_ACK_CORE_CTLr_fields[] =
{
    /* UC_ACK_CORE_CFG_DONE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1414, 0, 0),
    /* UC_ACK_CORE_DP_RESET:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1415, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_DSC_CDR_CTL0r_fields[] =
{
    /* CDR_PHASE_SAT_CTRL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(389, 0, 0),
    /* BR_PD_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(349, 1, 1),
    /* CDR_FREQ_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(377, 2, 2),
    /* CDR_INTEG_REG_CLR:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(383, 4, 4),
    /* CDR_PHASE_ERR_FRZ:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(388, 5, 5),
    /* CDR_INTEG_SAT_SEL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(384, 6, 6),
    /* CDR_FREQ_OVERRIDE_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(378, 7, 7),
    /* CDR_LM_THR_SEL:8:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(386, 10, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_CDR_CTL1r_fields[] =
{
    /* CDR_FREQ_OVERRIDE_VAL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_CDR_CTL2r_fields[] =
{
    /* CDR_ZERO_POLARITY:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(392, 0, 0),
    /* PHASE_ERR_OFFSET_MULT_2:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1015, 1, 1),
    /* PATTERN_SEL:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(973, 7, 4),
    /* OSX2P_PHERR_GAIN:8:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(959, 9, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_CDR_STS_INTEGr_fields[] =
{
    /* CDR_INTEG_REG:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(382, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_CDR_STS_PHASE_ERRr_fields[] =
{
    /* CDR_PHASE_ERR:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(387, 4, 0),
    /* CDR_LM_OUTOFLOCK:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(385, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_CTLr_fields[] =
{
    /* PD_CH_P1:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1000, 0, 0),
    /* OFFSET_PD:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(953, 1, 1),
    /* EN_HGAIN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(720, 2, 2),
    /* P1_THRESH_SEL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(972, 3, 3),
    /* M1_THRESH_ZERO:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(868, 4, 4),
    /* M1_THRESH_SEL:5:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(867, 6, 5),
    /* PF_HIZ:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1012, 7, 7),
    /* EN_DFE_CLK:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(719, 8, 8),
    /* OFFSET_FASTACQ:9:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(952, 9, 9)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DC_OFFSr_fields[] =
{
    /* DC_OFFSET:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(583, 6, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_1_CTLr_fields[] =
{
    /* DFE_1_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(609, 0, 0),
    /* DFE_1_CMN_ONLY:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(611, 1, 1),
    /* DFE_1_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(618, 8, 8),
    /* DFE_1_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(617, 9, 9),
    /* DFE_1_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(614, 11, 10),
    /* DFE_1_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(616, 12, 12),
    /* DFE_1_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(615, 14, 13),
    /* DFE_1_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(613, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_1_PAT_CTLr_fields[] =
{
    /* DFE_1_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(620, 5, 0),
    /* DFE_1_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(621, 13, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_1_STSr_fields[] =
{
    /* DFE_1_CMN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(610, 5, 0),
    /* DFE_1_O:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(619, 10, 8),
    /* DFE_1_E:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(612, 13, 11),
    /* DFE_1_WANTS_NEGATIVE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(622, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_2_CTLr_fields[] =
{
    /* DFE_2_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(623, 0, 0),
    /* DFE_2_CMN_ONLY:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(625, 1, 1),
    /* DFE_2_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(632, 8, 8),
    /* DFE_2_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(631, 9, 9),
    /* DFE_2_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(628, 11, 10),
    /* DFE_2_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(630, 12, 12),
    /* DFE_2_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(629, 14, 13),
    /* DFE_2_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(627, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_2_PAT_CTLr_fields[] =
{
    /* DFE_2_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(634, 5, 0),
    /* DFE_2_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(635, 13, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_2_STSr_fields[] =
{
    /* DFE_2_CMN:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(624, 4, 0),
    /* DFE_2_SO:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(637, 5, 5),
    /* DFE_2_SE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(636, 6, 6),
    /* DFE_2_O:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(633, 10, 8),
    /* DFE_2_E:11:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(626, 13, 11)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_3_4_5_STSr_fields[] =
{
    /* DFE_3_CMN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(639, 5, 0),
    /* DFE_4_CMN:6:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(649, 10, 6),
    /* DFE_5_CMN:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(659, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_3_CTLr_fields[] =
{
    /* DFE_3_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(638, 0, 0),
    /* DFE_3_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(645, 8, 8),
    /* DFE_3_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(644, 9, 9),
    /* DFE_3_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(641, 11, 10),
    /* DFE_3_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(643, 12, 12),
    /* DFE_3_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(642, 14, 13),
    /* DFE_3_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(640, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_3_PAT_CTLr_fields[] =
{
    /* DFE_3_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(646, 5, 0),
    /* DFE_3_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(647, 13, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_4_CTLr_fields[] =
{
    /* DFE_4_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(648, 0, 0),
    /* DFE_4_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(655, 8, 8),
    /* DFE_4_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(654, 9, 9),
    /* DFE_4_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(651, 11, 10),
    /* DFE_4_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(653, 12, 12),
    /* DFE_4_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(652, 14, 13),
    /* DFE_4_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(650, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_4_PAT_CTLr_fields[] =
{
    /* DFE_4_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(656, 5, 0),
    /* DFE_4_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(657, 13, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_5_CTLr_fields[] =
{
    /* DFE_5_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(658, 0, 0),
    /* DFE_5_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(665, 8, 8),
    /* DFE_5_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(664, 9, 9),
    /* DFE_5_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(661, 11, 10),
    /* DFE_5_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(663, 12, 12),
    /* DFE_5_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(662, 14, 13),
    /* DFE_5_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(660, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_5_PAT_CTLr_fields[] =
{
    /* DFE_5_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(666, 5, 0),
    /* DFE_5_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(667, 13, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_COMMON_CTLr_fields[] =
{
    /* DFE_UPDATE_GAIN:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(676, 13, 13),
    /* DFE_ALLOW_SIMULT:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(669, 14, 14),
    /* DFE_ACC_HYS_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(668, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_DFE_VGA_OVRRr_fields[] =
{
    /* DFE_VGA_WRITE_VAL:0:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(679, 8, 0),
    /* DFE_VGA_WRITE_TAPSEL:9:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(678, 13, 9),
    /* DFE_VGA_WRITE_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(677, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_OFFS_ADJ_DATA_EVENr_fields[] =
{
    /* DFE_OFFSET_ADJ_DATA_EVEN:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(670, 5, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_OFFS_ADJ_DATA_ODDr_fields[] =
{
    /* DFE_OFFSET_ADJ_DATA_ODD:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(671, 5, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_OFFS_ADJ_M1_EVENr_fields[] =
{
    /* DFE_OFFSET_ADJ_M1_EVEN:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(672, 5, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_OFFS_ADJ_M1_ODDr_fields[] =
{
    /* DFE_OFFSET_ADJ_M1_ODD:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(673, 5, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_OFFS_ADJ_P1_EVENr_fields[] =
{
    /* DFE_OFFSET_ADJ_P1_EVEN:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(674, 5, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_OFFS_ADJ_P1_ODDr_fields[] =
{
    /* DFE_OFFSET_ADJ_P1_ODD:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(675, 5, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_P1_FRAC_OFFS_CTLr_fields[] =
{
    /* P1_OFFSET:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(969, 6, 0),
    /* P1_OFFSET_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(970, 7, 7),
    /* P1_OFF_3LEVELQ_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(971, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_PF2_LOWP_CTLr_fields[] =
{
    /* PF2_LOWP_CTRL:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1010, 2, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_PF_CTLr_fields[] =
{
    /* PF_CTRL:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1011, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields[] =
{
    /* CNT_BIN_D_DREG:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(550, 6, 0),
    /* CNT_BIN_P1_DREG:8:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(554, 14, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Mr_fields[] =
{
    /* CNT_BIN_M1_MREG:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(552, 6, 0),
    /* CNT_BIN_D_MREG:8:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(551, 14, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields[] =
{
    /* CNT_BIN_P1_PREG:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(555, 6, 0),
    /* CNT_BIN_M1_PREG:8:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(553, 14, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_RX_PI_CTLr_fields[] =
{
    /* RX_PI_PHASE_STEP_CNT:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1191, 6, 0),
    /* RX_PI_MANUAL_STROBE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1190, 9, 9),
    /* RX_PI_PHASE_STEP_DIR:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1192, 10, 10),
    /* RX_PI_MANUAL_MODE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1188, 11, 11),
    /* RX_PI_SLICERS_EN:12:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1193, 14, 12),
    /* RX_PI_MANUAL_RESET:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1189, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_RX_PI_DIFF_BINr_fields[] =
{
    /* CNT_D_MINUS_M1:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(556, 7, 0),
    /* CNT_D_MINUS_P1:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(557, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SCRATCHr_fields[] =
{
    /* UC_DSC_SCRATCH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1426, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL0r_fields[] =
{
    /* EEE_MODE_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(706, 1, 1),
    /* EEE_QUIET_RX_AFE_PWRDWN_VAL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(710, 2, 2),
    /* IGNORE_RX_MODE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(770, 3, 3),
    /* CL72_TIMER_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(506, 4, 4),
    /* UC_TUNE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1429, 5, 5),
    /* HW_TUNE_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(765, 6, 6),
    /* UC_TRNSUM_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1428, 7, 7),
    /* EEE_MEASURE_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(705, 8, 8),
    /* UC_ACK_DSC_EEE_DONE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1417, 11, 11),
    /* UC_ACK_DSC_RESET:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1418, 12, 12),
    /* UC_ACK_DSC_RESTART:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1419, 13, 13),
    /* UC_ACK_DSC_CONFIG:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1416, 14, 14),
    /* SET_MEAS_INCOMPLETE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1231, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL1r_fields[] =
{
    /* RX_DSC_LOCK_FRC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1179, 0, 0),
    /* RX_DSC_LOCK_FRC_VAL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1180, 1, 1),
    /* DSC_CLR_FRC:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(690, 2, 2),
    /* DSC_CLR_FRC_VAL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(691, 3, 3),
    /* TRNSUM_FRZ_FRC:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1304, 4, 4),
    /* TRNSUM_FRZ_FRC_VAL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1305, 5, 5),
    /* TIMER_DONE_FRC:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1291, 6, 6),
    /* TIMER_DONE_FRC_VAL:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1292, 7, 7),
    /* FREQ_UPD_EN_FRC:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(747, 8, 8),
    /* FREQ_UPD_EN_FRC_VAL:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(748, 9, 9),
    /* CDR_FRZ_FRC:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(380, 10, 10),
    /* CDR_FRZ_FRC_VAL:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(381, 11, 11),
    /* TRNSUM_CLR_FRC:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1296, 12, 12),
    /* TRNSUM_CLR_FRC_VAL:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1297, 13, 13)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL2r_fields[] =
{
    /* EEE_LFSR_CNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(703, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL3r_fields[] =
{
    /* MEASURE_LFSR_CNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(890, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL4r_fields[] =
{
    /* ACQ_CDR_TIMEOUT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1, 4, 0),
    /* CDR_SETTLE_TIMEOUT:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(391, 9, 5),
    /* HW_TUNE_TIMEOUT:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(766, 14, 10)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL5r_fields[] =
{
    /* MEASURE_TIMEOUT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(891, 4, 0),
    /* EEE_ACQ_CDR_TIMEOUT:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(699, 9, 5),
    /* EEE_CDR_SETTLE_TIMEOUT:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(701, 14, 10)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL6r_fields[] =
{
    /* EEE_HW_TUNE_TIMEOUT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(702, 4, 0),
    /* EEE_ANA_PWR_TIMEOUT:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(700, 14, 10)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL7r_fields[] =
{
    /* CDR_BWSEL_INTEG_ACQCDR:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(371, 3, 0),
    /* CDR_BWSEL_INTEG_EEE_ACQCDR:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(372, 7, 4),
    /* CDR_BWSEL_INTEG_NORM:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(373, 11, 8),
    /* CDR_BWSEL_PROP_ACQCDR:12:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(374, 13, 12),
    /* CDR_BWSEL_PROP_NORM:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(376, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL8r_fields[] =
{
    /* PHASE_ERR_OFFSET:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1013, 3, 0),
    /* EEE_PHASE_ERR_OFFSET:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(707, 7, 4),
    /* PHASE_ERR_OFFSET_EN:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1014, 9, 8),
    /* EEE_PHASE_ERR_OFFSET_EN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(708, 11, 10),
    /* CDR_BWSEL_PROP_EEE_ACQCDR:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(375, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_CTL9r_fields[] =
{
    /* RX_RESTART_PMD:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1198, 0, 0),
    /* RX_RESTART_PMD_HOLD:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1199, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_STS_DSC_LOCKr_fields[] =
{
    /* RX_DSC_LOCK:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1178, 0, 0),
    /* MEAS_INCOMPLETE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(892, 1, 1),
    /* EEE_MEASURE_CNT:7:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(704, 15, 7)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_STS_DSC_STr_fields[] =
{
    /* DSC_SM_SCRATCH:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(694, 3, 0),
    /* DSC_SM_READY_FOR_CMD:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(693, 4, 4),
    /* DSC_SM_GP_UC_REQ:5:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(692, 10, 5),
    /* DSC_STATE:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(695, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields[] =
{
    /* DSC_STATE_EEE_ONE_HOT:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(696, 6, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields[] =
{
    /* DSC_STATE_ONE_HOT:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(697, 9, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_SM_STS_RESTARTr_fields[] =
{
    /* RESTART_PI_EXT_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1122, 0, 0),
    /* RESTART_SIGDET:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1124, 1, 1),
    /* RESTART_PMD_RESTART:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1123, 2, 2),
    /* EEE_QUIET_FROM_EEE_STATES:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(709, 3, 3)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_CTL1r_fields[] =
{
    /* TRNSUM_TAP_RANGE_SEL:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1317, 3, 2),
    /* CDR_QPHASE_MULT_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(390, 4, 4),
    /* TRNSUM_EYE_CLOSURE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1301, 5, 5),
    /* TRNSUM_GAIN:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1306, 7, 6),
    /* TRNSUM_PATTERN_FULL_CHECK_OFF:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1314, 9, 9),
    /* TRNSUM_INV_PATTERN_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1308, 10, 10),
    /* TRNSUM_RANDOM_TAPSEL_DISABLE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1315, 11, 11),
    /* TRNSUM_ERR_SEL:12:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1300, 14, 12),
    /* TRNSUM_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1298, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_CTL2r_fields[] =
{
    /* TRNSUM_PATTERN_BIT_EN:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1313, 7, 0),
    /* TRNSUM_PATTERN:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1312, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_CTL3r_fields[] =
{
    /* TRNSUM_TAP_SIGN:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1318, 7, 0),
    /* TRNSUM_TAP_EN:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1316, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_CTL4r_fields[] =
{
    /* TRNSUM_UNSIGNED_CORR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1319, 0, 0),
    /* TRNSUM_UNSIGNED_FLIP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1320, 1, 1),
    /* TDR_BIT_SEL:2:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1282, 6, 2),
    /* TDR_TRNSUM_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1285, 7, 7),
    /* TDR_CYCLE_SEL:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1284, 11, 8),
    /* TDR_CYCLE_BIN:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1283, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_CTL5r_fields[] =
{
    /* SEND_LMS_TO_PCS:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1228, 14, 14)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_STS1r_fields[] =
{
    /* TRNSUM_E_HIGH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1302, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_STS2r_fields[] =
{
    /* TRNSUM_E_LOW:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1303, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_STS3r_fields[] =
{
    /* TRNSUM_O_HIGH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1310, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_STS4r_fields[] =
{
    /* TRNSUM_O_LOW:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1311, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_STS5r_fields[] =
{
    /* TRNSUM_HIGH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1307, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_TRNSUM_STS6r_fields[] =
{
    /* TRNSUM_LOW:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1309, 9, 0)
};
static uint32_t BCMI_TSCE_XGXS_DSC_UC_CTLr_fields[] =
{
    /* UC_DSC_GP_UC_REQ:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1424, 5, 0),
    /* UC_DSC_ERROR_FOUND:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1423, 6, 6),
    /* UC_DSC_READY_FOR_CMD:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1425, 7, 7),
    /* UC_DSC_SUPP_INFO:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1427, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_VGA_CTLr_fields[] =
{
    /* VGA_P1_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1445, 0, 0),
    /* VGA_ACC_HYS_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1437, 1, 1),
    /* VGA_TABLEMAP_DISABLE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1449, 2, 2),
    /* VGA_UPDATE_GAIN:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1450, 7, 6),
    /* VGA_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1444, 8, 8),
    /* VGA_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1443, 9, 9),
    /* VGA_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1441, 11, 10),
    /* VGA_P1_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1446, 12, 12),
    /* VGA_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1442, 14, 13),
    /* VGA_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1440, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_VGA_P1EYEDIAG_STSr_fields[] =
{
    /* VGA_BIN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1438, 5, 0),
    /* P1_EYEDIAG_BIN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(967, 13, 8)
};
static uint32_t BCMI_TSCE_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr_fields[] =
{
    /* VGA_PATTERN:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1447, 3, 0),
    /* VGA_PATTERN_BIT_EN:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1448, 7, 4),
    /* P1_EYEDIAG_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(968, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_DSC_VGA_TAP_BINr_fields[] =
{
    /* VGA_CTRL_BIN:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1439, 4, 0),
    /* VGA3_CTRL_BIN:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1436, 11, 8)
};
static uint32_t BCMI_TSCE_XGXS_ILKN_CTL0r_fields[] =
{
    /* WM:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1456, 2, 0),
    /* ILKN_SEL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(771, 3, 3),
    /* INV_TX_ORDER:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(776, 6, 6),
    /* INV_RX_ORDER:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(775, 7, 7),
    /* SOFT_RST_TX:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1258, 8, 8),
    /* SOFT_RST_RX:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1257, 9, 9),
    /* CREDIT_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(572, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_ILKN_STS0r_fields[] =
{
    /* RXFIFO_EMPTY:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1164, 0, 0),
    /* RXFIFO_FULL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1165, 1, 1),
    /* RXFIFO_OVERRUN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1166, 2, 2),
    /* RXFIFO_UNDERRUN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1167, 3, 3),
    /* TXFIFO_EMPTY:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1321, 4, 4),
    /* TXFIFO_FULL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1322, 5, 5),
    /* TXFIFO_OVERRUN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1323, 6, 6),
    /* TXFIFO_UNDERRUN:7:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1324, 7, 7)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_DEVINPKG5r_fields[] =
{
    /* CLAUSE22:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(544, 0, 0),
    /* PMA_PMD:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1045, 1, 1),
    /* WIS:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1455, 2, 2),
    /* PCS_XS:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(999, 3, 3),
    /* PHY_XS:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1016, 4, 4),
    /* DTE_XS:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(698, 5, 5),
    /* TC:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1281, 6, 6),
    /* AN:7:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(200, 7, 7)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_LN_SWPr_fields[] =
{
    /* LOG0_TO_PHY_LNSWAP_SEL:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(834, 1, 0),
    /* LOG1_TO_PHY_LNSWAP_SEL:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(835, 3, 2),
    /* LOG2_TO_PHY_LNSWAP_SEL:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(836, 5, 4),
    /* LOG3_TO_PHY_LNSWAP_SEL:6:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(837, 7, 6)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_LPBK_CTLr_fields[] =
{
    /* LOCAL_PCS_LOOPBACK_ENABLE:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(833, 7, 4),
    /* REMOTE_PMD_LOOPBACK_ENABLE:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1111, 11, 8),
    /* REMOTE_PCS_LOOPBACK_ENABLE:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1110, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_MDIO_BCSTr_fields[] =
{
    /* MULTIPRTS_EN:7:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(945, 10, 7),
    /* PRTAD_BCST:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1092, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_MISCr_fields[] =
{
    /* CL82_MLD_PHYS_MAP:7:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(535, 8, 7),
    /* CL82_MULTI_PIPE_MODE:9:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(536, 10, 9),
    /* CL49_LOW_LATENCY_EN:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(449, 11, 11)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_SERDESIDr_fields[] =
{
    /* MODEL_NUMBER:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(942, 5, 0),
    /* TECH_PROC:6:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1286, 8, 6),
    /* BONDING:9:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(345, 10, 9),
    /* REV_NUMBER:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1141, 13, 11),
    /* REV_LETTER:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1140, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_SETUPr_fields[] =
{
    /* STAND_ALONE_MODE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1262, 2, 2),
    /* SINGLE_PORT_MODE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1254, 3, 3),
    /* PORT_MODE_SEL:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1063, 6, 4),
    /* MASTER_PORT_NUM:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(873, 9, 8),
    /* PLL_RESET_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1039, 10, 10),
    /* CL73_LOW_VCO:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(522, 11, 11),
    /* CL37_HIGH_VCO:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(413, 12, 12),
    /* REFCLK_SEL:13:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1104, 15, 13)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_SYNCE_CTLr_fields[] =
{
    /* SYNCE_MODE_PHY_LN0:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1273, 1, 0),
    /* SYNCE_MODE_PHY_LN1:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1274, 3, 2),
    /* SYNCE_MODE_PHY_LN2:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1275, 5, 4),
    /* SYNCE_MODE_PHY_LN3:6:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1276, 7, 6)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_TICK_CTL0r_fields[] =
{
    /* TICK_DENOMINATOR:2:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1287, 11, 2),
    /* TICK_NUMERATOR_LOWER:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1288, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_MAIN0_TICK_CTL1r_fields[] =
{
    /* TICK_NUMERATOR_UPPER:0:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1289, 14, 0),
    /* TICK_OVERRIDE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1290, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_MDIO_AERr_fields[] =
{
    /* MDIO_AER:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(876, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_MDIO_BCST_PORT_ADDRr_fields[] =
{
    /* MDIO_BRCST_PORT_ADDR:0:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(878, 4, 0)
};
static uint32_t BCMI_TSCE_XGXS_MDIO_BLK_ADDRr_fields[] =
{
    /* MDIO_BLK_ADDR:4:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(877, 14, 4)
};
static uint32_t BCMI_TSCE_XGXS_MDIO_MASKDATAr_fields[] =
{
    /* MDIO_MASKDATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(887, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_MDIO_MMD_SELr_fields[] =
{
    /* MDIO_DEV_CL22_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(881, 0, 0),
    /* MDIO_DEV_PMD_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(885, 2, 2),
    /* MDIO_DEV_AN_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(880, 3, 3),
    /* MDIO_DEV_PHY_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(884, 4, 4),
    /* MDIO_DEV_DTE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(882, 5, 5),
    /* MDIO_DEV_PCS_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(883, 6, 6),
    /* MDIO_MULTI_MMDS_EN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(888, 14, 14),
    /* MDIO_MULTI_PRTS_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(889, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_CORRUPTr_fields[] =
{
    /* DESKEW_ECC_CORRUPT:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(602, 1, 0),
    /* RFEC0_ECC_CORRUPT:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1146, 3, 2),
    /* RFEC1_ECC_CORRUPT:4:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1152, 5, 4)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_DESKEW_STSr_fields[] =
{
    /* DESKEW_ADDRESS:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(600, 6, 0),
    /* DESKEW_2BIT_ERROR:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(599, 14, 14),
    /* DESKEW_1BIT_ERROR:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(598, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_DISr_fields[] =
{
    /* DESKEW_DISABLE_ECC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(601, 0, 0),
    /* RFEC0_DISABLE_ECC:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1145, 1, 1),
    /* RFEC1_DISABLE_ECC:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1151, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_INT_1BITr_fields[] =
{
    /* INT_1B:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(772, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_INT_2BITr_fields[] =
{
    /* INT_2B:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(773, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_MSK_1BITr_fields[] =
{
    /* MSK_1B:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(943, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_MSK_2BITr_fields[] =
{
    /* MSK_2B:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(944, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_RFEC0_STSr_fields[] =
{
    /* RFEC0_ADDRESS:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1144, 7, 0),
    /* RFEC0_2BIT_ERROR:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1143, 14, 14),
    /* RFEC0_1BIT_ERROR:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1142, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_MEM_ECC_RFEC1_STSr_fields[] =
{
    /* RFEC1_ADDRESS:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1150, 7, 0),
    /* RFEC1_2BIT_ERROR:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1149, 14, 14),
    /* RFEC1_1BIT_ERROR:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1148, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_MEM_TM_DESKEWr_fields[] =
{
    /* DESKEW_TM:0:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(608, 11, 0)
};
static uint32_t BCMI_TSCE_XGXS_MEM_TM_RFEC0r_fields[] =
{
    /* RFEC0_TM:0:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1147, 11, 0)
};
static uint32_t BCMI_TSCE_XGXS_MEM_TM_RFEC1r_fields[] =
{
    /* RFEC1_TM:0:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 11, 0)
};
static uint32_t BCMI_TSCE_XGXS_MISC_CL72_EN_MASKr_fields[] =
{
    /* CL72_EN_MASK:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(474, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_MISC_SCRMBLR_CTLr_fields[] =
{
    /* SCRAMBLER_EN_MASK:0:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1202, 4, 0)
};
static uint32_t BCMI_TSCE_XGXS_MISC_TX_RATE_MISMATCHr_fields[] =
{
    /* TX_LANE_RATE_MISMATCH:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1363, 3, 0),
    /* TX_LANE_RATE_MISMATCH_VL1:4:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1364, 7, 4)
};
static uint32_t BCMI_TSCE_XGXS_MISC_XGXSSTS0r_fields[] =
{
    /* SKEW_STATUS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1255, 0, 0),
    /* STATUS_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1263, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_RXPKTCNT_Lr_fields[] =
{
    /* RXPKTCNT_L:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1168, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_RXPKTCNT_Ur_fields[] =
{
    /* RXPKTCNT_U:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1169, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ0r_fields[] =
{
    /* PATT_GEN_SEQ_0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(975, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ1r_fields[] =
{
    /* PATT_GEN_SEQ_1:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(976, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ2r_fields[] =
{
    /* PATT_GEN_SEQ_2:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(982, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ3r_fields[] =
{
    /* PATT_GEN_SEQ_3:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(983, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ4r_fields[] =
{
    /* PATT_GEN_SEQ_4:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(984, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ5r_fields[] =
{
    /* PATT_GEN_SEQ_5:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(985, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ6r_fields[] =
{
    /* PATT_GEN_SEQ_6:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(986, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ7r_fields[] =
{
    /* PATT_GEN_SEQ_7:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(987, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ8r_fields[] =
{
    /* PATT_GEN_SEQ_8:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(988, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ9r_fields[] =
{
    /* PATT_GEN_SEQ_9:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(989, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ_10r_fields[] =
{
    /* PATT_GEN_SEQ_10:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(977, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ_11r_fields[] =
{
    /* PATT_GEN_SEQ_11:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(978, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ_12r_fields[] =
{
    /* PATT_GEN_SEQ_12:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(979, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ_13r_fields[] =
{
    /* PATT_GEN_SEQ_13:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(980, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_SEQ_14r_fields[] =
{
    /* PATT_GEN_SEQ_14:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(981, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_TXPKTCNT_Lr_fields[] =
{
    /* TXPKTCNT_L:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PATGEN_TXPKTCNT_Ur_fields[] =
{
    /* TXPKTCNT_U:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1345, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PHYID2r_fields[] =
{
    /* REGID1:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1105, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PHYID3r_fields[] =
{
    /* REGID2:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1106, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_CRCERRCNTr_fields[] =
{
    /* CRCERRCNT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(569, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_CTL1r_fields[] =
{
    /* PKT_OR_PRTP:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1019, 0, 0),
    /* TX_TEST_PORT_SEL:1:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1412, 2, 1),
    /* LPI_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(845, 3, 3),
    /* PRTP_DATA_PATTERN_SEL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1093, 5, 5),
    /* TX_PRTP_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1406, 6, 6),
    /* RX_PORT_SEL:7:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1196, 8, 7),
    /* CLR_CRCCNT:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(549, 9, 9),
    /* RX_MSBUS_TYPE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1187, 10, 10),
    /* RX_PKT_CHECK_EN:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1194, 11, 11),
    /* NUMBER_PKT:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(947, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_CTL2r_fields[] =
{
    /* IPG_SIZE:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(777, 4, 0),
    /* PKT_SIZE:5:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1020, 10, 5),
    /* PAYLOAD_TYPE:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(992, 13, 11),
    /* TX_MSBUS_TYPE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1369, 14, 14),
    /* PKTGEN_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1018, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_ERRMASK0r_fields[] =
{
    /* ERROR_MASK_15_0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(726, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_ERRMASK1r_fields[] =
{
    /* ERROR_MASK_31_16:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(727, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_ERRMASK2r_fields[] =
{
    /* ERROR_MASK_47_32:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(728, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_ERRMASK3r_fields[] =
{
    /* ERROR_MASK_63_48:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(729, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_ERRMASK4r_fields[] =
{
    /* ERROR_MASK_79_64:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(730, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PAYLOADBYTESr_fields[] =
{
    /* BYTE0:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(355, 7, 0),
    /* BYTE1:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(356, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA0r_fields[] =
{
    /* SEEDA0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1220, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA1r_fields[] =
{
    /* SEEDA1:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1221, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA2r_fields[] =
{
    /* SEEDA2:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1222, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA3r_fields[] =
{
    /* SEEDA3:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1223, 9, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB0r_fields[] =
{
    /* SEEDB0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1224, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB1r_fields[] =
{
    /* SEEDB1:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1225, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB2r_fields[] =
{
    /* SEEDB2:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1226, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB3r_fields[] =
{
    /* SEEDB3:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1227, 9, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PRTPCTLr_fields[] =
{
    /* RX_PRTP_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1197, 4, 4),
    /* ERRGEN_EN:5:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(721, 8, 5)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PRTPERRCTRr_fields[] =
{
    /* PRTP_ERR_COUNT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1094, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PKTGEN_PRTPLOCKSTSr_fields[] =
{
    /* PRTP_LOCK:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1095, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL0r_fields[] =
{
    /* VCO_STEP_TIME:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1435, 7, 0),
    /* VCO_START_TIME:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1434, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL1r_fields[] =
{
    /* RETRY_TIME:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1126, 7, 0),
    /* PRE_FREQ_DET_TIME:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1087, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL2r_fields[] =
{
    /* WIN_CAL_CNTR:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1454, 7, 0),
    /* RES_CAL_CNTR:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1125, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL3r_fields[] =
{
    /* FAST_SEARCH_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(734, 0, 0),
    /* CAP_CNT_MASK_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(357, 1, 1),
    /* CAP_SEQ_CYA:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(369, 2, 2),
    /* CAP_RESTART:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(364, 3, 3),
    /* CAP_RETRY_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(365, 4, 4),
    /* CAP_FORCE_SLOWDOWN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(360, 5, 5),
    /* CAP_FORCE_SLOWDOWN_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(361, 6, 6),
    /* CAP_SELECT_M_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(368, 7, 7),
    /* CAP_SELECT_M:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(367, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL4r_fields[] =
{
    /* PLL_LOCK_FRC_VAL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1030, 0, 0),
    /* PLL_LOCK_FRC:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1029, 1, 1),
    /* PLL_FORCE_CAP_PASS:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1023, 2, 2),
    /* PLL_FORCE_CAP_PASS_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1024, 3, 3),
    /* PLL_FORCE_CAP_DONE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1021, 4, 4),
    /* PLL_FORCE_CAP_DONE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1022, 5, 5),
    /* PLL_FORCE_FPASS:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1027, 6, 6),
    /* PLL_FORCE_FDONE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1025, 7, 7),
    /* PLL_FORCE_FDONE_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1026, 8, 8),
    /* VCO_RST_EN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1433, 9, 9),
    /* SLOWDN_XOR:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1256, 10, 10),
    /* FREQ_MONITOR_EN:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(744, 11, 11),
    /* FREQ_DET_RESTART_EN:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(740, 12, 12),
    /* FREQ_DET_RETRY_EN:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(741, 13, 13),
    /* VCO_DONE_EN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1432, 14, 14),
    /* PLL_SEQ_START:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1044, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL5r_fields[] =
{
    /* REFCLK_DIVCNT:0:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1102, 13, 0)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL6r_fields[] =
{
    /* REFCLK_DIVCNT_SEL:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1103, 2, 0)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL7r_fields[] =
{
    /* PLL_MODE:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1038, 3, 0),
    /* RESCAL_FRC_VAL:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1117, 7, 4),
    /* RESCAL_FRC:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1116, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL_STS0r_fields[] =
{
    /* PLL_LOCK_LH_LL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1032, 0, 0),
    /* PLL_SEQ_PASS_LH_LL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1043, 1, 1),
    /* PLL_SEQ_DONE_LH_LL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1041, 2, 2),
    /* FREQ_PASS_SM_LH_LL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(746, 3, 3),
    /* FREQ_DONE_SM_LH_LL:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(743, 4, 4),
    /* CAP_PASS_LH_LL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(363, 5, 5),
    /* CAP_DONE_LH_LL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(359, 6, 6),
    /* PLL_LOCK:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1028, 8, 8),
    /* PLL_SEQ_PASS:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1042, 9, 9),
    /* PLL_SEQ_DONE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1040, 10, 10),
    /* FREQ_PASS_SM:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(745, 11, 11),
    /* FREQ_DONE_SM:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(742, 12, 12),
    /* CAP_PASS:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(362, 13, 13),
    /* CAP_DONE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(358, 14, 14),
    /* LOST_PLL_LOCK_SM:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(842, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL_STS1r_fields[] =
{
    /* CAP_SELECT:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(366, 7, 0),
    /* RESCAL_IN:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1118, 11, 8)
};
static uint32_t BCMI_TSCE_XGXS_PLL_CAL_CTL_STS_DBGr_fields[] =
{
    /* DBG_SLOWDN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(581, 0, 0),
    /* DBG_SLOWDN_CHANGE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(582, 1, 1),
    /* DBG_FDBCK:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(578, 2, 2),
    /* DBG_CAP_STATE_ONE_HOT:3:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(573, 7, 3),
    /* DBG_PLL_STATE_ONE_HOT:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(580, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X1_CTLr_fields[] =
{
    /* CORE_DP_H_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(560, 0, 0),
    /* POR_H_RSTB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1064, 1, 1),
    /* PRAM_ABILITY:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1067, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X1_LATCH_STSr_fields[] =
{
    /* PLL_LOCK_LL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1033, 0, 0),
    /* PLL_LOCK_LH:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1031, 1, 1),
    /* TX_CLK_VLD_LL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1348, 2, 2),
    /* TX_CLK_VLD_LH:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1347, 3, 3)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X1_MODEr_fields[] =
{
    /* CORE_MODE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(564, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X1_OVRRr_fields[] =
{
    /* PLL_LOCK_OVRD:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1034, 0, 0),
    /* TX_CLK_VLD_OVRD:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1349, 1, 1),
    /* CORE_MODE_OEN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(565, 2, 2),
    /* CORE_DP_H_RSTB_OEN:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(561, 3, 3)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X1_STSr_fields[] =
{
    /* PLL_LOCK_STS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1035, 0, 0),
    /* TX_CLK_VLD_STS:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1350, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X4_CTLr_fields[] =
{
    /* LN_DP_H_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(815, 0, 0),
    /* LN_H_RSTB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(818, 1, 1),
    /* LN_TX_H_PWRDN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(828, 2, 2),
    /* LN_RX_H_PWRDN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(820, 3, 3),
    /* TX_DISABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1351, 8, 8),
    /* OSR_MODE:9:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(954, 12, 9),
    /* RX_DME_EN:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1176, 13, 13)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X4_EEE_CTLr_fields[] =
{
    /* TX_MODE:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1368, 1, 0),
    /* RX_MODE:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1186, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X4_EEE_STSr_fields[] =
{
    /* ENERGY_DETECT:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(714, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X4_LATCH_STSr_fields[] =
{
    /* RX_LOCK_LL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1183, 0, 0),
    /* RX_LOCK_LH:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1182, 1, 1),
    /* SIGNAL_DETECT_LL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1248, 2, 2),
    /* SIGNAL_DETECT_LH:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1247, 3, 3),
    /* RX_CLK_VLD_LL:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1173, 4, 4),
    /* RX_CLK_VLD_LH:5:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1172, 5, 5)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X4_MODEr_fields[] =
{
    /* LANE_MODE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(792, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X4_OVRRr_fields[] =
{
    /* RX_LOCK_OVRD:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1184, 0, 0),
    /* SIGNAL_DETECT_OVRD:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1249, 1, 1),
    /* RX_CLK_VLD_OVRD:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1174, 2, 2),
    /* LANE_MODE_OEN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(793, 3, 3),
    /* OSR_MODE_OEN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(957, 4, 4),
    /* RX_DME_EN_OEN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1177, 5, 5),
    /* TX_DISABLE_OEN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1352, 6, 6),
    /* LN_DP_H_RSTB_OEN:7:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(816, 7, 7)
};
static uint32_t BCMI_TSCE_XGXS_PMD_X4_STSr_fields[] =
{
    /* RX_LOCK_STS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1185, 0, 0),
    /* SIGNAL_DETECT_STS:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1252, 1, 1),
    /* RX_CLK_VLD_STS:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1175, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_DEC_CTL0r_fields[] =
{
    /* HYSTCOUNT:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(767, 3, 0),
    /* GCWCOUNT:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(751, 7, 4),
    /* SCWCOUNT:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1215, 11, 8)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_DEC_CTL1r_fields[] =
{
    /* CL49_BER_LIMIT:2:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(446, 7, 2),
    /* CL82_BER_LIMIT:8:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(529, 14, 8),
    /* SET_BER_WINDOW_512:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1230, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_DESKEW_WINSr_fields[] =
{
    /* CL48_DSWIN8B10B:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(422, 3, 0),
    /* CL48_DSWIN64B66B:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(421, 6, 4),
    /* CL82_DSWIN:7:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(531, 11, 7),
    /* CL82_DSWIN_100G:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(532, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_INVALID_SHCNT_CL82r_fields[] =
{
    /* CL82_INVALID_SH_CNT:0:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(534, 11, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW0r_fields[] =
{
    /* SCW0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1205, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW0_MASKr_fields[] =
{
    /* SCW0_MASK:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1206, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW1r_fields[] =
{
    /* SCW1:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1207, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW1_MASKr_fields[] =
{
    /* SCW1_MASK:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1208, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW2r_fields[] =
{
    /* SCW2:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1209, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW2_MASKr_fields[] =
{
    /* SCW2_MASK:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW3r_fields[] =
{
    /* SCW3:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1211, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW3_MASKr_fields[] =
{
    /* SCW3_MASK:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1212, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW4r_fields[] =
{
    /* SCW4:0:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1213, 1, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SCW4_MASKr_fields[] =
{
    /* SCW4_MASK:0:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1214, 1, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_SHCNT_CL49r_fields[] =
{
    /* CL49_INVALID_SH_CNT:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(448, 7, 0),
    /* CL49_VALID_SH_CNT:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(464, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_RX_X1_VALID_SHCNT_CL82r_fields[] =
{
    /* CL82_VALID_SH_CNT:0:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(543, 11, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X2_MISC0r_fields[] =
{
    /* BYPASS_CL82RXSM:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(354, 0, 0),
    /* DIS_CL82_BERMON:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(688, 1, 1),
    /* BRCM_MODE_USE_K20PT5:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(348, 8, 8),
    /* CHK_END_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10),
    /* LINK_EN:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(807, 12, 12)
};
static uint32_t BCMI_TSCE_XGXS_RX_X2_MISC1r_fields[] =
{
    /* CL82_RX_RF_ENABLE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(539, 0, 0),
    /* CL82_RX_LF_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(537, 1, 1),
    /* CL48_RX_RF_ENABLE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(426, 2, 2),
    /* CL48_RX_LF_ENABLE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(423, 3, 3),
    /* CL48_RX_LI_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(424, 8, 8),
    /* CL82_RX_LI_ENABLE:9:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(538, 9, 9)
};
static uint32_t BCMI_TSCE_XGXS_RX_X2_QRSVD0r_fields[] =
{
    /* CL48_RX_QRSVDCTRL:1:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(425, 4, 1),
    /* QRSVDSWAP:5:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1101, 14, 5)
};
static uint32_t BCMI_TSCE_XGXS_RX_X2_QRSVD1r_fields[] =
{
    /* QRSVD2_8_2:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1099, 6, 0),
    /* QRSVD1:7:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1097, 15, 7)
};
static uint32_t BCMI_TSCE_XGXS_RX_X2_QRSVD2r_fields[] =
{
    /* QRSVD3:5:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1100, 13, 5),
    /* QRSVD2_1_0:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1098, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_RX_X2_SKEW_STS0r_fields[] =
{
    /* CL48_SKEWACQ_STATE_D_3:3:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(430, 5, 3),
    /* CL48_SKEWACQ_STATE_D_2:6:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(429, 8, 6),
    /* CL48_SKEWACQ_STATE_D_1:9:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(428, 11, 9),
    /* CL48_SKEWACQ_STATE_D_0:12:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(427, 14, 12),
    /* CL48_SKEW_STATUS:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(432, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X2_SKEW_STS1r_fields[] =
{
    /* CL48_SKEWACQ_STATE_L:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(431, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_BARREL_SHIFTER_STr_fields[] =
{
    /* SHIFT_AMMOUNT:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1239, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_BERCNTr_fields[] =
{
    /* BER_COUNT_PER_LN:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(340, 7, 0),
    /* BIP_ERROR_COUNT_PER_LANE:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_CL36_RX0r_fields[] =
{
    /* CL36_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(398, 0, 0),
    /* REORDER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1112, 1, 1),
    /* DISABLE_CARRIER_EXTEND:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(685, 2, 2),
    /* CL36_FORCE_COMMA_ALIGN_ENABLE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(400, 3, 3),
    /* CL36_BER_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(397, 5, 5)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_CL49_LOCK_FSM_STSr_fields[] =
{
    /* LSM_CURR_STATE:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(864, 1, 0),
    /* LSM_HIS_STATE:2:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(865, 4, 2)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_CL82_AM_LATCH_STSr_fields[] =
{
    /* AM_LOCK_HIS_STATE:0:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(195, 9, 0),
    /* AMRKR_SPACING_ERR_LATCH_MUX:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(17, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_CL82_AM_LIVE_STSr_fields[] =
{
    /* AM_LOCK_STATE:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(198, 9, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_CTL0r_fields[] =
{
    /* BLOCK_SYNC_MODE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(343, 2, 0),
    /* CL49_RX_RF_ENABLE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(455, 4, 4),
    /* CL49_RX_LF_ENABLE:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(453, 5, 5),
    /* CL49_RX_LI_ENABLE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(454, 6, 6),
    /* DISABLE_CL49_BERMON:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(686, 8, 8),
    /* HG2_CODEC:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(755, 9, 9),
    /* CL48_CGBAD_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(420, 10, 10),
    /* CL48_SYNCACQ_EN:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(433, 11, 11),
    /* HG2_ENABLE:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(756, 12, 12),
    /* HG2_MESSAGE_INVALID_CODE_ENABLE:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(757, 13, 13),
    /* R_TEST_MODE_CFG:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1200, 14, 14),
    /* BYPASS_CL49RXSM:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(353, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_CTL1r_fields[] =
{
    /* B66DEC_CGBAD_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(297, 0, 0),
    /* B66DEC_SYNCERRCOUNT_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(305, 1, 1),
    /* B66DEC_KCODE66ERRCOUNT_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(301, 2, 2),
    /* B66DEC_FAULT_DET_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(300, 3, 3),
    /* B66DEC_PROG_TL_CHAR:4:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(303, 11, 4),
    /* B66DEC_PROG_TL_EN:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(304, 12, 12),
    /* B66DEC_NOBLOCKLOCK_DOUT_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(302, 14, 13),
    /* B66DEC_DOUT_ERRORS_IF_BAD_SYNC:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(298, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_STS0r_fields[] =
{
    /* CL49_RXSM_CURRENT_STATE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(451, 2, 0),
    /* CL49_RXSM_HISTORY_STATE:3:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(452, 10, 3),
    /* CL49_R_TYPE_CODED:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(456, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_STS1r_fields[] =
{
    /* CL49_BERMON_CURRENT_STATE:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(444, 4, 0),
    /* CL49_BERMON_HISTORY_STATE:5:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(445, 9, 5)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_STS2r_fields[] =
{
    /* KCODE66ERRCOUNT:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(778, 7, 0),
    /* SYNC66ERRCOUNT:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1272, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_STS3r_fields[] =
{
    /* CL49IEEE_ERRORED_BLOCKS:2:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(443, 9, 2)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_STS4r_fields[] =
{
    /* CL48_SYNCACQ_STATE_L:4:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(438, 14, 4),
    /* B66DEC_FAULT_DET:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(299, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_DEC_STS5r_fields[] =
{
    /* CL48_SYNCACQ_STATE_D_3:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(437, 3, 0),
    /* CL48_SYNCACQ_STATE_D_2:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(436, 7, 4),
    /* CL48_SYNCACQ_STATE_D_1:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(435, 11, 8),
    /* CL48_SYNCACQ_STATE_D_0:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(434, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC0r_fields[] =
{
    /* FAST_LOCK_EN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(733, 9, 9),
    /* DBG_ENABLE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(574, 10, 10),
    /* ERROR_EN_OVR_VAL:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(725, 11, 11),
    /* ERROR_EN_OVR:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(724, 12, 12),
    /* FEC_ERR_ENABLE:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(739, 13, 13)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC1r_fields[] =
{
    /* DBG_ERR_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(577, 0, 0),
    /* BURST_ERR_STATUS_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(352, 1, 1),
    /* DEC_MAX_PM:2:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(590, 7, 2),
    /* INVALID_PARITY_CNT:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(774, 11, 8),
    /* GOOD_PARITY_CNT:12:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(752, 14, 12),
    /* FEC_ERROR_CODE_ALL:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(738, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC2r_fields[] =
{
    /* DEC_GAP_COUNT_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(589, 1, 1),
    /* DEC_17B_BURST_GAP_COUNT:2:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(586, 4, 2),
    /* DEC_18B_BURST_GAP_COUNT:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(587, 7, 5),
    /* DEC_19B_BURST_GAP_COUNT:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(588, 10, 8),
    /* DEC_PM_MODE:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(591, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_BURST_ERR_STSHr_fields[] =
{
    /* BURST_ERR_STATUSH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(350, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_BURST_ERR_STSLr_fields[] =
{
    /* BURST_ERR_STATUSL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(351, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_CORRBLKSHr_fields[] =
{
    /* CORCOUNTH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(558, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_CORRBLKSLr_fields[] =
{
    /* CORCOUNTL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(559, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_DBG_ERRAHr_fields[] =
{
    /* DBG_ERRH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(575, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_DBG_ERRLr_fields[] =
{
    /* DBG_ERRL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(576, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_UNCORRBLKSHr_fields[] =
{
    /* UNCORCOUNTH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1430, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_FEC_UNCORRBLKSLr_fields[] =
{
    /* UNCORCOUNTL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1431, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_GBOX_STSr_fields[] =
{
    /* GBOX_UNDERFLOW_ERR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(750, 0, 0),
    /* GBOX_OVERFLOW_ERR:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(749, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_LNK_CTLr_fields[] =
{
    /* LATCH_LINKDOWN_ENABLE:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(798, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_PCS_CTL0r_fields[] =
{
    /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(346, 1, 1),
    /* LPI_ENABLE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(846, 2, 2),
    /* CL36BYTEDELETEMODE:3:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(395, 4, 3),
    /* DESC2_MODE:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(592, 7, 5),
    /* DESKEWMODE:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(596, 10, 8),
    /* DECODERMODE:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(584, 13, 11),
    /* DESCRAMBLERMODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(594, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_PCS_LATCH_STS0r_fields[] =
{
    /* SYNC_STATUS_LL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1279, 6, 6),
    /* SYNC_STATUS_LH:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1278, 7, 7),
    /* LINK_STATUS_LL:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(814, 8, 8),
    /* LINK_STATUS_LH:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(813, 9, 9),
    /* HI_BER_LL:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(760, 10, 10),
    /* HI_BER_LH:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(759, 11, 11),
    /* DESKEW_STATUS_LL:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(607, 12, 12),
    /* DESKEW_STATUS_LH:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(606, 13, 13),
    /* AM_LOCK_LL:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(197, 14, 14),
    /* AM_LOCK_LH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(196, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_PCS_LATCH_STS1r_fields[] =
{
    /* LPI_RECEIVED_LH:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(848, 3, 3),
    /* RESERVED_ORDERED_BYTE_3:4:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1119, 11, 4),
    /* RESERVED_ORDERED_SET_LH:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1120, 12, 12),
    /* LINK_INTERRUPT_LH:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(811, 13, 13),
    /* REMOTE_FAULT_LH:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1109, 14, 14),
    /* LOCAL_FAULT_LH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(832, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_PCS_LIVE_STSr_fields[] =
{
    /* SYNC_STATUS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1277, 0, 0),
    /* LINK_STATUS:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(812, 1, 1),
    /* HI_BER:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(758, 2, 2),
    /* DESKEW_STATUS:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(605, 3, 3),
    /* AM_LOCK:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(194, 4, 4),
    /* LPI_RECEIVED:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(847, 5, 5),
    /* LINK_INTERRUPT:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(810, 6, 6),
    /* REMOTE_FAULT:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1107, 7, 7),
    /* LOCAL_FAULT:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(831, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_PMA_CTL0r_fields[] =
{
    /* RSTB_LANE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1160, 0, 0),
    /* RX_GBOX_AFRST_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1181, 1, 1),
    /* OS_MODE:3:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 6, 3)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_SYNCACQ_STS0r_fields[] =
{
    /* CL36_SYNCACQ_STATE_CODED_PER_LN:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(402, 3, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_SYNCACQ_STS1r_fields[] =
{
    /* CL36_SYNCACQ_HIS_STATE_PER_LN:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(401, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_BARREL_SHIFTER_STr_fields[] =
{
    /* SHIFT_AMMOUNT:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1239, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_BERCNTr_fields[] =
{
    /* BIP_ERROR_COUNT_PER_LANE:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_CL49_LOCK_FSM_STSr_fields[] =
{
    /* LSM_CURR_STATE:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(864, 1, 0),
    /* LSM_HIS_STATE:2:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(865, 4, 2),
    /* ALIGN_STATUS_CL82:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(16, 7, 7),
    /* RMLD_STATUS:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1154, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_CL82_PCS_LATCH_STSr_fields[] =
{
    /* AM_LOCK_HIS_STATE:0:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(195, 9, 0),
    /* AMRKR_SPACING_ERR_LATCH_MUX:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(17, 10, 10),
    /* SYNC_STATUS_LL:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1279, 12, 12),
    /* SYNC_STATUS_LH:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1278, 13, 13),
    /* AM_LOCK_LL:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(197, 14, 14),
    /* AM_LOCK_LH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(196, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_CL82_PCS_LIVE_STSr_fields[] =
{
    /* AM_LOCK_STATE:0:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(198, 9, 0),
    /* SYNC_STATUS:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1277, 14, 14),
    /* AM_LOCK:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(194, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC0r_fields[] =
{
    /* FAST_LOCK_EN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(733, 9, 9),
    /* DBG_ENABLE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(574, 10, 10),
    /* ERROR_EN_OVR_VAL:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(725, 11, 11),
    /* ERROR_EN_OVR:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(724, 12, 12),
    /* FEC_ERR_ENABLE:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(739, 13, 13)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC1r_fields[] =
{
    /* DBG_ERR_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(577, 0, 0),
    /* BURST_ERR_STATUS_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(352, 1, 1),
    /* DEC_MAX_PM:2:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(590, 7, 2),
    /* INVALID_PARITY_CNT:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(774, 11, 8),
    /* GOOD_PARITY_CNT:12:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(752, 14, 12),
    /* FEC_ERROR_CODE_ALL:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(738, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC2r_fields[] =
{
    /* DEC_GAP_COUNT_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(589, 1, 1),
    /* DEC_17B_BURST_GAP_COUNT:2:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(586, 4, 2),
    /* DEC_18B_BURST_GAP_COUNT:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(587, 7, 5),
    /* DEC_19B_BURST_GAP_COUNT:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(588, 10, 8),
    /* DEC_PM_MODE:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(591, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_BURST_ERR_STSHr_fields[] =
{
    /* BURST_ERR_STATUSH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(350, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_BURST_ERR_STSLr_fields[] =
{
    /* BURST_ERR_STATUSL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(351, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_CORRBLKSHr_fields[] =
{
    /* CORCOUNTH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(558, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_CORRBLKSLr_fields[] =
{
    /* CORCOUNTL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(559, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_DBG_ERRAHr_fields[] =
{
    /* DBG_ERRH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(575, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_DBG_ERRLr_fields[] =
{
    /* DBG_ERRL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(576, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_UNCORRBLKSHr_fields[] =
{
    /* UNCORCOUNTH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1430, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_FEC_UNCORRBLKSLr_fields[] =
{
    /* UNCORCOUNTL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1431, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_RX_X4_T12_MLD_VL_INFO0r_fields[] =
{
    /* VL_ON_LL_0:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1451, 4, 0),
    /* VL_ON_LL_1:5:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1452, 9, 5)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_PIPE_RST_CNTr_fields[] =
{
    /* PIPELINE_RESET_COUNT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1017, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_PLL_LOCK_TMRr_fields[] =
{
    /* PLL_LOCK_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1037, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_PMD_LOCK_TMRr_fields[] =
{
    /* PMD_LOCK_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1054, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_0r_fields[] =
{
    /* ENCODEMODE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(712, 2, 0),
    /* FEC_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(736, 8, 8),
    /* CL72_ENABLE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(473, 9, 9),
    /* SCR_MODE:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1203, 11, 10),
    /* OS_MODE:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_1r_fields[] =
{
    /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(346, 1, 1),
    /* CL36BYTEDELETEMODE:3:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(395, 4, 3),
    /* DESC2_MODE:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(592, 7, 5),
    /* DESKEWMODE:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(596, 10, 8),
    /* DECODERMODE:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(584, 13, 11),
    /* DESCRAMBLERMODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(594, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_2r_fields[] =
{
    /* CL36_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(398, 0, 0),
    /* REORDER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1112, 1, 1),
    /* BLOCK_SYNC_MODE:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(343, 6, 4),
    /* CHK_END_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_3r_fields[] =
{
    /* CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(545, 13, 0),
    /* SGMII_SPD_SWITCH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_4r_fields[] =
{
    /* CLOCKCNT1:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_5r_fields[] =
{
    /* LOOPCNT1:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(840, 5, 0),
    /* LOOPCNT0:6:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(838, 13, 6)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_6r_fields[] =
{
    /* MAC_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(869, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_7r_fields[] =
{
    /* PCS_CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(993, 13, 0),
    /* PCS_CREDITENABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(995, 14, 14),
    /* REPLICATION_CNT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1114, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_8r_fields[] =
{
    /* PCS_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_SPDr_fields[] =
{
    /* NUM_LANES:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(949, 2, 0),
    /* SPEED:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1261, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_0r_fields[] =
{
    /* ENCODEMODE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(712, 2, 0),
    /* FEC_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(736, 8, 8),
    /* CL72_ENABLE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(473, 9, 9),
    /* SCR_MODE:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1203, 11, 10),
    /* OS_MODE:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_1r_fields[] =
{
    /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(346, 1, 1),
    /* CL36BYTEDELETEMODE:3:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(395, 4, 3),
    /* DESC2_MODE:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(592, 7, 5),
    /* DESKEWMODE:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(596, 10, 8),
    /* DECODERMODE:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(584, 13, 11),
    /* DESCRAMBLERMODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(594, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_2r_fields[] =
{
    /* CL36_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(398, 0, 0),
    /* REORDER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1112, 1, 1),
    /* BLOCK_SYNC_MODE:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(343, 6, 4),
    /* CHK_END_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_3r_fields[] =
{
    /* CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(545, 13, 0),
    /* SGMII_SPD_SWITCH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_4r_fields[] =
{
    /* CLOCKCNT1:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_5r_fields[] =
{
    /* LOOPCNT1:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(840, 5, 0),
    /* LOOPCNT0:6:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(838, 13, 6)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_6r_fields[] =
{
    /* MAC_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(869, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_7r_fields[] =
{
    /* PCS_CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(993, 13, 0),
    /* PCS_CREDITENABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(995, 14, 14),
    /* REPLICATION_CNT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1114, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_8r_fields[] =
{
    /* PCS_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_SPDr_fields[] =
{
    /* NUM_LANES:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(949, 2, 0),
    /* SPEED:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1261, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_0r_fields[] =
{
    /* ENCODEMODE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(712, 2, 0),
    /* FEC_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(736, 8, 8),
    /* CL72_ENABLE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(473, 9, 9),
    /* SCR_MODE:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1203, 11, 10),
    /* OS_MODE:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_1r_fields[] =
{
    /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(346, 1, 1),
    /* CL36BYTEDELETEMODE:3:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(395, 4, 3),
    /* DESC2_MODE:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(592, 7, 5),
    /* DESKEWMODE:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(596, 10, 8),
    /* DECODERMODE:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(584, 13, 11),
    /* DESCRAMBLERMODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(594, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_2r_fields[] =
{
    /* CL36_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(398, 0, 0),
    /* REORDER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1112, 1, 1),
    /* BLOCK_SYNC_MODE:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(343, 6, 4),
    /* CHK_END_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_3r_fields[] =
{
    /* CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(545, 13, 0),
    /* SGMII_SPD_SWITCH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_4r_fields[] =
{
    /* CLOCKCNT1:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_5r_fields[] =
{
    /* LOOPCNT1:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(840, 5, 0),
    /* LOOPCNT0:6:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(838, 13, 6)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_6r_fields[] =
{
    /* MAC_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(869, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_7r_fields[] =
{
    /* PCS_CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(993, 13, 0),
    /* PCS_CREDITENABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(995, 14, 14),
    /* REPLICATION_CNT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1114, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_8r_fields[] =
{
    /* PCS_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_SPDr_fields[] =
{
    /* NUM_LANES:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(949, 2, 0),
    /* SPEED:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1261, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_0r_fields[] =
{
    /* ENCODEMODE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(712, 2, 0),
    /* FEC_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(736, 8, 8),
    /* CL72_ENABLE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(473, 9, 9),
    /* SCR_MODE:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1203, 11, 10),
    /* OS_MODE:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_1r_fields[] =
{
    /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(346, 1, 1),
    /* CL36BYTEDELETEMODE:3:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(395, 4, 3),
    /* DESC2_MODE:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(592, 7, 5),
    /* DESKEWMODE:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(596, 10, 8),
    /* DECODERMODE:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(584, 13, 11),
    /* DESCRAMBLERMODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(594, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_2r_fields[] =
{
    /* CL36_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(398, 0, 0),
    /* REORDER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1112, 1, 1),
    /* BLOCK_SYNC_MODE:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(343, 6, 4),
    /* CHK_END_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_3r_fields[] =
{
    /* CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(545, 13, 0),
    /* SGMII_SPD_SWITCH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_4r_fields[] =
{
    /* CLOCKCNT1:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_5r_fields[] =
{
    /* LOOPCNT1:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(840, 5, 0),
    /* LOOPCNT0:6:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(838, 13, 6)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_6r_fields[] =
{
    /* MAC_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(869, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_7r_fields[] =
{
    /* PCS_CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(993, 13, 0),
    /* PCS_CREDITENABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(995, 14, 14),
    /* REPLICATION_CNT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1114, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_8r_fields[] =
{
    /* PCS_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_SPDr_fields[] =
{
    /* NUM_LANES:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(949, 2, 0),
    /* SPEED:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1261, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_STSr_fields[] =
{
    /* RESOLVED_PORT_MODE:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1121, 2, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X1_TX_RST_CNTr_fields[] =
{
    /* TX_RESET_COUNT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1408, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_BYPASSr_fields[] =
{
    /* SC_BYPASS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1216, 0, 0),
    /* SC_IGNORE_TX_DATA_VLD:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1218, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_CTLr_fields[] =
{
    /* SW_SPEED:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1268, 7, 0),
    /* SW_SPEED_CHANGE:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1269, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_DBGr_fields[] =
{
    /* SC_FSM_STATUS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1217, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_ERRr_fields[] =
{
    /* PLL_LOCK_TIMED_OUT:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1036, 0, 0),
    /* PMD_LOCK_TIMED_OUT:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1053, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_FLD_OVRR_EN0_TYPEr_fields[] =
{
    /* BLOCK_SYNC_MODE_OEN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(344, 0, 0),
    /* CHK_END_EN_OEN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(394, 2, 2),
    /* BRCM64B66_DESCRAMBLER_ENABLE_OEN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(347, 3, 3),
    /* CL36BYTEDELETEMODE_OEN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(396, 4, 4),
    /* DESC2_MODE_OEN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(593, 5, 5),
    /* DESKEWMODE_OEN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(597, 6, 6),
    /* DECODERMODE_OEN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(585, 7, 7),
    /* DESCRAMBLERMODE_OEN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(595, 8, 8),
    /* ENCODEMODE_OEN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(713, 9, 9),
    /* FEC_ENABLE_OEN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(737, 10, 10),
    /* SCR_MODE_OEN:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1204, 11, 11),
    /* OS_MODE_OEN:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(961, 12, 12),
    /* NUM_LANES_OEN:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(950, 14, 14)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_FLD_OVRR_EN1_TYPEr_fields[] =
{
    /* PCS_CREDITGENCNT_OEN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(998, 0, 0),
    /* PCS_CLOCKCNT0_OEN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(994, 1, 1),
    /* PCS_CREDITENABLE_OEN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(996, 2, 2),
    /* REPLICATION_CNT_OEN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1115, 3, 3),
    /* MAC_CREDITGENCNT_OEN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(870, 4, 4),
    /* LOOPCNT1_OEN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(841, 5, 5),
    /* LOOPCNT0_OEN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(839, 6, 6),
    /* CLOCKCNT1_OEN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(548, 7, 7),
    /* CLOCKCNT0_OEN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(546, 8, 8),
    /* CREDITENABLE_OEN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(571, 9, 9),
    /* SGMII_SPD_SWITCH_OEN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1235, 10, 10),
    /* CL36_EN_OEN:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(399, 11, 11),
    /* REORDER_EN_OEN:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1113, 12, 12),
    /* CL72_EN_OEN:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(475, 13, 13)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_LN_NUM_OVRRr_fields[] =
{
    /* NUM_LANES_OVERRIDE_VALUE:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(951, 2, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD0r_fields[] =
{
    /* ENCODEMODE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(712, 2, 0),
    /* FEC_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(736, 8, 8),
    /* CL72_ENABLE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(473, 9, 9),
    /* SCR_MODE:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1203, 11, 10),
    /* OS_MODE:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD1r_fields[] =
{
    /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(346, 1, 1),
    /* CL36BYTEDELETEMODE:3:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(395, 4, 3),
    /* DESC2_MODE:5:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(592, 7, 5),
    /* DESKEWMODE:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(596, 10, 8),
    /* DECODERMODE:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(584, 13, 11),
    /* DESCRAMBLERMODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(594, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD2r_fields[] =
{
    /* CL36_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(398, 0, 0),
    /* REORDER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1112, 1, 1),
    /* BLOCK_SYNC_MODE:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(343, 6, 4),
    /* CHK_END_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD3r_fields[] =
{
    /* CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(545, 13, 0),
    /* SGMII_SPD_SWITCH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD4r_fields[] =
{
    /* CLOCKCNT1:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD5r_fields[] =
{
    /* LOOPCNT1:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(840, 5, 0),
    /* LOOPCNT0:6:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(838, 13, 6)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD6r_fields[] =
{
    /* MAC_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(869, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD7r_fields[] =
{
    /* PCS_CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(993, 13, 0),
    /* PCS_CREDITENABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(995, 14, 14),
    /* REPLICATION_CNT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1114, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD8r_fields[] =
{
    /* PCS_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_RSLVD_SPDr_fields[] =
{
    /* NUM_LANES:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(949, 2, 0),
    /* SPEED:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1261, 15, 8)
};
static uint32_t BCMI_TSCE_XGXS_SC_X4_STSr_fields[] =
{
    /* SW_SPEED_CHANGE_DONE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1270, 0, 0),
    /* SW_SPEED_CONFIG_VLD:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1271, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_SIGDET_CTL0r_fields[] =
{
    /* SIGNAL_DETECT_FILTER_COUNT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1244, 4, 0),
    /* LOS_FILTER_COUNT:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(843, 12, 8)
};
static uint32_t BCMI_TSCE_XGXS_SIGDET_CTL1r_fields[] =
{
    /* AFE_SIGNAL_DETECT_DIS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(8, 0, 0),
    /* EXT_LOS_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(731, 1, 1),
    /* EXT_LOS_INV:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(732, 2, 2),
    /* IGNORE_LP_MODE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(769, 3, 3),
    /* SIGNAL_DETECT_FILTER_1US:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1243, 4, 4),
    /* ENERGY_DETECT_FRC:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(716, 5, 5),
    /* ENERGY_DETECT_FRC_VAL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(717, 6, 6),
    /* SIGNAL_DETECT_FRC:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1245, 7, 7),
    /* SIGNAL_DETECT_FRC_VAL:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1246, 8, 8),
    /* ENERGY_DETECT_MASK_COUNT:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(718, 15, 11)
};
static uint32_t BCMI_TSCE_XGXS_SIGDET_CTL2r_fields[] =
{
    /* LOS_THRESH:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(844, 2, 0),
    /* SIGNAL_DETECT_THRESH:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1253, 6, 4),
    /* HOLD_LOS_COUNT:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(761, 10, 8),
    /* HOLD_SD_COUNT:11:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(762, 13, 11)
};
static uint32_t BCMI_TSCE_XGXS_SIGDET_STS0r_fields[] =
{
    /* SIGNAL_DETECT:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1241, 0, 0),
    /* SIGNAL_DETECT_CHANGE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1242, 1, 1),
    /* ENERGY_DETECT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(714, 2, 2),
    /* ENERGY_DETECT_CHANGE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(715, 3, 3),
    /* SIGNAL_DETECT_RAW:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1250, 4, 4),
    /* SIGNAL_DETECT_RAW_CHANGE:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1251, 5, 5),
    /* AFE_SIGDET_THRESH:8:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(7, 10, 8)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_DIG_LPBK_CFGr_fields[] =
{
    /* DIG_LPBK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(680, 0, 0),
    /* DIG_LPBK_PD_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(684, 1, 1),
    /* DIG_LPBK_PD_FLT_BYPASS:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(682, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields[] =
{
    /* DIG_LPBK_PD_LATE_IND:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(683, 0, 0),
    /* DIG_LPBK_PD_EARLY_IND:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(681, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields[] =
{
    /* PMD_RX_LOCK:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1058, 0, 0),
    /* PMD_RX_LOCK_CHANGE:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1059, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_CFGr_fields[] =
{
    /* PRBS_CHK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1069, 0, 0),
    /* PRBS_CHK_MODE_SEL:1:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1081, 3, 1),
    /* PRBS_CHK_INV:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1076, 4, 4),
    /* PRBS_CHK_MODE:5:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1080, 6, 5),
    /* PRBS_CHK_EN_AUTO_MODE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1070, 7, 7),
    /* PRBS_CHK_ERR_CNT_BURST_MODE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1073, 9, 9),
    /* TRNSUM_ERROR_COUNT_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1299, 10, 10),
    /* PRBS_CHK_CLK_EN_FRC_ON:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1068, 11, 11)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields[] =
{
    /* PRBS_CHK_LOCK_CNT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1078, 4, 0),
    /* PRBS_CHK_OOL_CNT:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1082, 12, 8)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields[] =
{
    /* PRBS_CHK_EN_TIMER_MODE:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1072, 1, 0),
    /* PRBS_CHK_EN_TIMEOUT:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1071, 12, 8)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields[] =
{
    /* PRBS_CHK_ERR_CNT_LSB:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields[] =
{
    /* PRBS_CHK_ERR_CNT_MSB:0:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1075, 14, 0),
    /* PRBS_CHK_LOCK_LOST_LH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1079, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields[] =
{
    /* PRBS_CHK_LOCK:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1077, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields[] =
{
    /* RX_PMD_DP_INVERT:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1195, 0, 0),
    /* RX_AGGREGATOR_BYPASS_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1171, 1, 1),
    /* DBG_MASK_DIG_LPBK_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(579, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_TLB_TX_PATGEN_CFGr_fields[] =
{
    /* PATT_GEN_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(974, 0, 0),
    /* PATT_GEN_STOP_POS:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(991, 11, 8),
    /* PATT_GEN_START_POS:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(990, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_TLB_TX_PRBS_GEN_CFGr_fields[] =
{
    /* PRBS_GEN_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1083, 0, 0),
    /* PRBS_GEN_MODE_SEL:1:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1086, 3, 1),
    /* PRBS_GEN_INV:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1085, 4, 4),
    /* PRBS_GEN_ERR_INS:5:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1084, 5, 5)
};
static uint32_t BCMI_TSCE_XGXS_TLB_TX_RMT_LPBK_CFGr_fields[] =
{
    /* RMT_LPBK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1155, 0, 0),
    /* RMT_LPBK_PD_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1159, 1, 1),
    /* RMT_LPBK_PD_FRC_ON:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1157, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields[] =
{
    /* RMT_LPBK_PD_LATE_IND:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1158, 0, 0),
    /* RMT_LPBK_PD_EARLY_IND:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1156, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields[] =
{
    /* TX_PMD_DP_INVERT:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1405, 0, 0),
    /* TX_PCS_NATIVE_ANA_FRMT_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1371, 1, 1),
    /* TX_MUX_SEL_ORDER:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1370, 2, 2)
};
static uint32_t BCMI_TSCE_XGXS_TLB_TX_TX_PI_LOOP_TIMING_CFGr_fields[] =
{
    /* TX_PI_LOOP_TIMING_SRC_SEL:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1391, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_CTL1r_fields[] =
{
    /* TXFIR_PRE_OVERRIDE:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1343, 4, 0),
    /* TXFIR_POST_OVERRIDE:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1339, 10, 5)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_CTL2r_fields[] =
{
    /* TXFIR_MAIN_OVERRIDE:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1328, 6, 0),
    /* TXFIR_POST2:7:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1330, 11, 7),
    /* TXFIR_OVERRIDE_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1329, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_CTL3r_fields[] =
{
    /* TXFIR_PRE_OFFSET:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1342, 3, 0),
    /* TXFIR_MAIN_OFFSET:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1327, 7, 4),
    /* TXFIR_POST_OFFSET:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1338, 11, 8),
    /* TXFIR_POST2_OFFSET:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1332, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_CTL4r_fields[] =
{
    /* TXFIR_POST3:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1333, 3, 0),
    /* TXFIR_POST3_OFFSET:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1335, 11, 8)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_MISC_CTL1r_fields[] =
{
    /* SDK_TX_DISABLE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1219, 0, 0),
    /* PMD_TX_DISABLE_PIN_DIS:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1062, 1, 1),
    /* TX_DISABLE_TIMER_CTRL:2:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1354, 7, 2),
    /* TX_EEE_QUIET_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1357, 8, 8),
    /* TX_EEE_ALERT_EN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1356, 9, 9),
    /* TX_DISABLE_OUTPUT_SEL:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1353, 11, 10),
    /* DP_RESET_TX_DISABLE_DIS:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(689, 12, 12)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_STS1r_fields[] =
{
    /* TXFIR_PRE_AFTER_OVR:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1341, 4, 0),
    /* TXFIR_POST_AFTER_OVR:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1337, 10, 5)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_STS2r_fields[] =
{
    /* TXFIR_MAIN_AFTER_OVR:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1326, 6, 0)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_STS3r_fields[] =
{
    /* TXFIR_PRE_ADJUSTED:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1340, 4, 0),
    /* TXFIR_POST_ADJUSTED:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1336, 10, 5)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_STS4r_fields[] =
{
    /* TXFIR_MAIN_ADJUSTED:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1325, 6, 0),
    /* TXFIR_POST2_ADJUSTED:7:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1331, 11, 7),
    /* TXFIR_POST3_ADJUSTED:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1334, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_TXFIR_UC_CTLr_fields[] =
{
    /* MICRO_TX_DISABLE:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(936, 0, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_CTL0r_fields[] =
{
    /* TX_PI_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1372, 0, 0),
    /* TX_PI_JITTER_FILTER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1384, 1, 1),
    /* TX_PI_EXT_CTRL_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1373, 2, 2),
    /* TX_PI_FREQ_OVERRIDE_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1377, 3, 3),
    /* TX_PI_SJ_GEN_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1403, 4, 4),
    /* TX_PI_SSC_GEN_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1404, 5, 5),
    /* TX_PI_JIT_SSC_FREQ_MODE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1387, 6, 6),
    /* TX_PI_SECOND_ORDER_LOOP_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1402, 7, 7),
    /* TX_PI_FIRST_ORDER_BWSEL_INTEG:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1375, 9, 8),
    /* TX_PI_SECOND_ORDER_BWSEL_INTEG:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1401, 11, 10),
    /* TX_PI_EXT_PHASE_BWSEL_INTEG:12:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1374, 14, 12)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_CTL1r_fields[] =
{
    /* TX_PI_FREQ_OVERRIDE_VAL:0:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1378, 14, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_CTL2r_fields[] =
{
    /* TX_PI_JIT_FREQ_IDX:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1386, 5, 0),
    /* TX_PI_JIT_AMP:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1385, 13, 8)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_CTL3r_fields[] =
{
    /* TX_PI_PHASE_OVERRIDE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1395, 0, 0),
    /* TX_PI_PHASE_STROBE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1398, 1, 1),
    /* TX_PI_PHASE_STEP_DIR:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1396, 2, 2),
    /* TX_PI_PHASE_INVERT:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1394, 4, 4),
    /* TX_PI_PHASE_STEP_NUM:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1397, 11, 8)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_CTL4r_fields[] =
{
    /* TX_PI_FRZ_FRC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1379, 0, 0),
    /* TX_PI_FRZ_FRC_VAL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1380, 1, 1),
    /* TX_PI_FRZ_MODE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1381, 2, 2),
    /* TX_PI_RESET_CODE_DBG:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1399, 3, 3),
    /* TX_PI_RMT_LPBK_BYPASS_FLT:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1400, 4, 4),
    /* TX_PI_FRC_PHASE_STEP_MUX_SEL:5:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1376, 5, 5)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_CTL6r_fields[] =
{
    /* TX_PI_LANE_SEL_FRC_VAL:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1389, 4, 0),
    /* TX_PI_LANE_SEL_FRC:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1388, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_STS0r_fields[] =
{
    /* TX_PI_PHASE_CNTR:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1392, 6, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_STS1r_fields[] =
{
    /* TX_PI_INTEG1_REG:0:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1382, 13, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_STS2r_fields[] =
{
    /* TX_PI_INTEG2_REG:0:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1383, 14, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_PI_STS3r_fields[] =
{
    /* TX_PI_PHASE_ERR:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1393, 5, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_X2_BRCM_MODEr_fields[] =
{
    /* ACOL_SWAP_COUNT64B66B:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(0, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_X2_CL48_0r_fields[] =
{
    /* CL48_TX_QRSVDCTRL:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(441, 3, 0),
    /* CL48_TX_RF_ENABLE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(442, 4, 4),
    /* CL48_TX_LF_ENABLE:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(439, 5, 5),
    /* CL48_TX_LI_ENABLE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(440, 6, 6),
    /* BRCM_MODE_USE_K20PT5:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(348, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_TX_X2_CL82_0r_fields[] =
{
    /* CL82_TX_RF_ENABLE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(542, 4, 4),
    /* CL82_TX_LF_ENABLE:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(540, 5, 5),
    /* CL82_TX_LI_ENABLE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(541, 6, 6),
    /* CL82_BYPASS_TXSM:10:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(530, 10, 10)
};
static uint32_t BCMI_TSCE_XGXS_TX_X2_CL82_TX_STS0r_fields[] =
{
    /* TXSM_STATE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1346, 2, 0),
    /* LTXSM_STATE:3:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(866, 9, 3),
    /* T_TYPE_CODED:10:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1413, 12, 10),
    /* CL82_IDLE_DELETION_UNDERFLOW:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(533, 13, 13)
};
static uint32_t BCMI_TSCE_XGXS_TX_X2_MLD_SWP_CNTr_fields[] =
{
    /* MLD_SWAP_COUNT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(941, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_CRED0r_fields[] =
{
    /* CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(545, 13, 0),
    /* CREDITENABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(570, 14, 14),
    /* SGMII_SPD_SWITCH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_CRED1r_fields[] =
{
    /* CLOCKCNT1:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 7, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_ENC0r_fields[] =
{
    /* ENCODEMODE:2:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(712, 4, 2),
    /* CL49_TX_TL_MODE:5:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(462, 6, 5),
    /* CL49_BYPASS_TXSM:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(447, 9, 9),
    /* HG2_ENABLE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(756, 10, 10),
    /* HG2_MESSAGE_INVALID_CODE_ENABLE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(757, 11, 11),
    /* HG2_CODEC:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(755, 12, 12)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_ENC1r_fields[] =
{
    /* PROG_TL_CHAR:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1090, 7, 0),
    /* PROG_TL_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1091, 8, 8),
    /* CATCH_ALL_8B10B_DIS:9:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(370, 9, 9)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_ENC_STS0r_fields[] =
{
    /* CL49_TXSM_STATE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(457, 2, 0),
    /* CL49_LTXSM_STATE:3:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(450, 10, 3),
    /* CL49_TX_FAULT_DET:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(458, 11, 11),
    /* CL49_T_TYPE_CODED:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(463, 15, 12)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_LOOPCNTr_fields[] =
{
    /* LOOPCNT1:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(840, 5, 0),
    /* LOOPCNT0:6:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(838, 13, 6)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_MAC_CREDGENCNTr_fields[] =
{
    /* MAC_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(869, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_MISCr_fields[] =
{
    /* ENABLE_TX_LANE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(711, 0, 0),
    /* RSTB_TX_LANE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1161, 1, 1),
    /* TX_FIFO_WATERMARK:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1358, 3, 2),
    /* CL49_TX_RF_ENABLE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(461, 6, 6),
    /* CL49_TX_LF_ENABLE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(459, 7, 7),
    /* CL49_TX_LI_ENABLE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(460, 8, 8),
    /* FEC_ENABLE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(736, 10, 10),
    /* SCR_MODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1203, 15, 14)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_PCS_CLKCNT0r_fields[] =
{
    /* PCS_CLOCKCNT0:0:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(993, 13, 0),
    /* PCS_CREDITENABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(995, 14, 14),
    /* REPLICATION_CNT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1114, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_PCS_CREDGENCNTr_fields[] =
{
    /* PCS_CREDITGENCNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 12, 0)
};
static uint32_t BCMI_TSCE_XGXS_TX_X4_PCS_STSr_fields[] =
{
    /* LPI_RECEIVED_LH:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(848, 0, 0),
    /* RESERVED_ORDERED_SET_LH:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1120, 1, 1),
    /* REMOTE_FAULT_LH:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1109, 2, 2),
    /* LOCAL_FAULT_LH:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(832, 3, 3),
    /* LINK_INTERRUPT_LH:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(811, 4, 4),
    /* TX_LPI_RECEIVED:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1367, 5, 5),
    /* TX_LINK_INTERRUPT:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1365, 6, 6),
    /* TX_REMOTE_FAULT:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1407, 7, 7),
    /* TX_LOCAL_FAULT:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1366, 8, 8)
};
static uint32_t BCMI_TSCE_XGXS_UC_ADDRr_fields[] =
{
    /* MICRO_RAM_ADDRESS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(920, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_COMMANDr_fields[] =
{
    /* MICRO_RUN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(926, 0, 0),
    /* MICRO_STOP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(932, 1, 1),
    /* MICRO_READ:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(925, 2, 2),
    /* MICRO_WRITE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(939, 3, 3),
    /* MICRO_MDIO_DW8051_RESET_N:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(906, 4, 4),
    /* MICRO_MDIO_RAM_READ_AUTOINC_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(910, 6, 6),
    /* MICRO_MDIO_RAM_ACCESS_MODE:7:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(909, 8, 7),
    /* MICRO_BYTE_MODE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(893, 9, 9),
    /* MICRO_MDIO_AUTOWAKEUP:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(905, 10, 10),
    /* MICRO_MDIO_PROG_RAM_CS_FRC:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(907, 11, 11),
    /* MICRO_MDIO_PROG_RAM_CS_FRC_VAL:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(908, 12, 12),
    /* MICRO_PMI_HP_ACK_FRC:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(914, 13, 13),
    /* MICRO_PMI_HP_ACK_FRC_VAL:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(915, 14, 14),
    /* MICRO_INIT_CMD:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_UC_COMMAND2r_fields[] =
{
    /* MICRO_PMI_ACK_TIMEOUT_VAL:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(913, 3, 0),
    /* MICRO_SRST_MDIO_DATARAM_ACCESS:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(928, 10, 10),
    /* MICRO_RAM_CLK_INVERT:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(921, 11, 11),
    /* MICRO_ZERO_ROM_DATAOUT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(940, 12, 12),
    /* MICRO_SRST_MDIO_LOAD_PROGRAM_RAM:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(929, 13, 13),
    /* MICRO_SRST_MDIO_PROGRAM_ACCESS:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(930, 14, 14),
    /* MICRO_SRST_DW8051_TO_PMI:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(927, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_UC_COMMAND3r_fields[] =
{
    /* MICRO_PRAM_IF_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(916, 0, 0),
    /* MICRO_PRAM_IF_FLOP_BYPASS:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(917, 1, 1),
    /* MICRO_PRAM_IF_RSTB:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(918, 2, 2),
    /* MICRO_INRUSH_CURRENT_FRC:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(902, 10, 10),
    /* MICRO_INRUSH_CURRENT_FRC_VAL:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(903, 11, 11),
    /* MICRO_DISABLE_ECC:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(895, 12, 12),
    /* MICRO_GEN_STATUS_SEL:13:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(899, 15, 13)
};
static uint32_t BCMI_TSCE_XGXS_UC_COMMAND4r_fields[] =
{
    /* MICRO_SYSTEM_CLK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(933, 0, 0),
    /* MICRO_SYSTEM_RESET_N:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(934, 1, 1)
};
static uint32_t BCMI_TSCE_XGXS_UC_DATARAM_CTL1r_fields[] =
{
    /* MICRO_DATARAM_TM:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(894, 9, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_DWNLOAD_STSr_fields[] =
{
    /* MICRO_ERR0:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(896, 0, 0),
    /* MICRO_ERR1:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(897, 1, 1),
    /* MICRO_FSM:2:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(898, 5, 2),
    /* MICRO_INIT_DONE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(901, 15, 15)
};
static uint32_t BCMI_TSCE_XGXS_UC_IRAM_CTL1r_fields[] =
{
    /* MICRO_IRAM_TM:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(904, 9, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_MDIO_UC_MAILBOX_LSWr_fields[] =
{
    /* MICRO_MDIO_UC_MAILBOX_LSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(911, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_MDIO_UC_MAILBOX_MSWr_fields[] =
{
    /* MICRO_MDIO_UC_MAILBOX_MSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(912, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_PROGRAM_RAM_CTL1r_fields[] =
{
    /* MICRO_PROGRAM_RAM_TM:0:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(919, 13, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_RAMWORDr_fields[] =
{
    /* MICRO_RAM_COUNT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(922, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_RAM_RDDATAr_fields[] =
{
    /* MICRO_RAM_RDDATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(923, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_RAM_WRDATAr_fields[] =
{
    /* MICRO_RAM_WRDATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(924, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_SFR_STSr_fields[] =
{
    /* MICRO_STATUS_MUXED:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_TEMPERATURE_STSr_fields[] =
{
    /* MICRO_TEMPATURE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(935, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_UC_MDIO_MAILBOX_LSWr_fields[] =
{
    /* MICRO_UC_MDIO_MAILBOX_LSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(937, 15, 0)
};
static uint32_t BCMI_TSCE_XGXS_UC_UC_MDIO_MAILBOX_MSWr_fields[] =
{
    /* MICRO_UC_MDIO_MAILBOX_MSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(938, 15, 0)
};



/*******************************************************************************
 *
 * The following is the field name table.
 */
#if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_TSCE_XGXS
const char* bcmi_tsce_xgxs_fields[] = 
{
    "ACOL_SWAP_COUNT64B66B",
    "ACQ_CDR_TIMEOUT",
    "AFE_RX_PWRDN_FRC",
    "AFE_RX_PWRDN_FRC_VAL",
    "AFE_RX_RESET_FRC",
    "AFE_RX_RESET_FRC_VAL",
    "AFE_SIGDET_PWRDN",
    "AFE_SIGDET_THRESH",
    "AFE_SIGNAL_DETECT_DIS",
    "AFE_S_PLL_PWRDN",
    "AFE_S_PLL_RESET_FRC",
    "AFE_S_PLL_RESET_FRC_VAL",
    "AFE_TX_PWRDN_FRC",
    "AFE_TX_PWRDN_FRC_VAL",
    "AFE_TX_RESET_FRC",
    "AFE_TX_RESET_FRC_VAL",
    "ALIGN_STATUS_CL82",
    "AMRKR_SPACING_ERR_LATCH_MUX",
    "AMS_PLL_2RX_CLKBW",
    "AMS_PLL_BGCALR_CTATADJ",
    "AMS_PLL_BGCALR_PTATADJ",
    "AMS_PLL_BGINT",
    "AMS_PLL_BGIP",
    "AMS_PLL_BGR_CTATADJ",
    "AMS_PLL_BGR_PTATADJ",
    "AMS_PLL_CAL_AUX",
    "AMS_PLL_CAL_OFF",
    "AMS_PLL_COMP_VTH",
    "AMS_PLL_DBLR_CTRL",
    "AMS_PLL_DITHEREN",
    "AMS_PLL_ENABLE_FTUNE",
    "AMS_PLL_EN_HRZ",
    "AMS_PLL_FORCE_KVH_BW",
    "AMS_PLL_FORCE_RESCAL",
    "AMS_PLL_FP3_CTRL",
    "AMS_PLL_FP3_RH",
    "AMS_PLL_FRACN_BYPASS",
    "AMS_PLL_FRACN_DIVRANGE",
    "AMS_PLL_FRACN_DIV_H",
    "AMS_PLL_FRACN_DIV_L",
    "AMS_PLL_FRACN_NDIV_INT",
    "AMS_PLL_FRACN_SEL",
    "AMS_PLL_IMAX_I10GBUF",
    "AMS_PLL_IMAX_IBIAS",
    "AMS_PLL_IMAX_ICK",
    "AMS_PLL_IMAX_ICKGEN",
    "AMS_PLL_IMAX_ICLKIDRV1",
    "AMS_PLL_IMAX_ICLKINT",
    "AMS_PLL_IMAX_ICML",
    "AMS_PLL_IMAX_ICOMP",
    "AMS_PLL_IMAX_ICP",
    "AMS_PLL_IMAX_IOP",
    "AMS_PLL_IMIN_I10GBUF",
    "AMS_PLL_IMIN_IBIAS",
    "AMS_PLL_IMIN_ICK",
    "AMS_PLL_IMIN_ICKGEN",
    "AMS_PLL_IMIN_ICLKIDRV1",
    "AMS_PLL_IMIN_ICLKINT",
    "AMS_PLL_IMIN_ICML",
    "AMS_PLL_IMIN_ICOMP",
    "AMS_PLL_IMIN_ICP",
    "AMS_PLL_IMIN_IOP",
    "AMS_PLL_IMODE_I10GBUF",
    "AMS_PLL_IMODE_IBIAS",
    "AMS_PLL_IMODE_ICK",
    "AMS_PLL_IMODE_ICKGEN",
    "AMS_PLL_IMODE_ICLKIDRV1",
    "AMS_PLL_IMODE_ICLKINT",
    "AMS_PLL_IMODE_ICML",
    "AMS_PLL_IMODE_ICOMP",
    "AMS_PLL_IMODE_ICP",
    "AMS_PLL_IMODE_IOP",
    "AMS_PLL_IQP",
    "AMS_PLL_IVCO",
    "AMS_PLL_KVH_FORCE",
    "AMS_PLL_LOWPWR_6G",
    "AMS_PLL_MAX_TEST_PORT_AMPL",
    "AMS_PLL_MIX2P1CR_CTATADJ",
    "AMS_PLL_MIX2P1CR_PTATADJ",
    "AMS_PLL_PDF_FD_SKEW",
    "AMS_PLL_PDF_REF_SKEW",
    "AMS_PLL_PDF_SKEW_ENLARGE",
    "AMS_PLL_REFCLK_DOUBLER",
    "AMS_PLL_REFH_PLL",
    "AMS_PLL_REFL_PLL",
    "AMS_PLL_RESET",
    "AMS_PLL_SPARE_100",
    "AMS_PLL_SPARE_18",
    "AMS_PLL_STS",
    "AMS_PLL_TEST_FRACN_EN",
    "AMS_PLL_TEST_PLL",
    "AMS_PLL_TEST_PNP",
    "AMS_PLL_TEST_RX",
    "AMS_PLL_TEST_VC",
    "AMS_PLL_TEST_VREF",
    "AMS_PLL_TXCG_VDDR_BGB",
    "AMS_PLL_TX_LOWPWR_6G",
    "AMS_PLL_VBYPASS",
    "AMS_PLL_VCOICTRL",
    "AMS_PLL_VCO_DIV2",
    "AMS_PLL_VCO_DIV4",
    "AMS_PLL_VCO_IMAX",
    "AMS_PLL_VDDR_BGB",
    "AMS_RX_DC_COUPLE",
    "AMS_RX_DC_OFFSET",
    "AMS_RX_DC_OFFSET_RANGE",
    "AMS_RX_DFE_OS2X_MODE",
    "AMS_RX_EN_10GMODE",
    "AMS_RX_EN_VCCTRL",
    "AMS_RX_FORCE_DC_OFFSET",
    "AMS_RX_I1P25DFE",
    "AMS_RX_I4DEADZONE",
    "AMS_RX_IMAX_COMMONMODE",
    "AMS_RX_IMAX_CTAT",
    "AMS_RX_IMAX_DC_OFFSET_DAC",
    "AMS_RX_IMAX_DFE_SUMMER",
    "AMS_RX_IMAX_DFE_TAP_WEIGHT",
    "AMS_RX_IMAX_METRES_EYEDIAG",
    "AMS_RX_IMAX_PF",
    "AMS_RX_IMAX_PHASE_INT",
    "AMS_RX_IMAX_PHASE_INT_P1",
    "AMS_RX_IMAX_SIGNAL_DETECT",
    "AMS_RX_IMAX_SLICER",
    "AMS_RX_IMAX_VGA",
    "AMS_RX_IMIN_COMMONMODE",
    "AMS_RX_IMIN_CTAT",
    "AMS_RX_IMIN_DC_OFFSET_DAC",
    "AMS_RX_IMIN_DFE_SUMMER",
    "AMS_RX_IMIN_DFE_TAP_WEIGHT",
    "AMS_RX_IMIN_METRES_EYEDIAG",
    "AMS_RX_IMIN_PF",
    "AMS_RX_IMIN_PHASE_INT",
    "AMS_RX_IMIN_PHASE_INT_P1",
    "AMS_RX_IMIN_SIGNAL_DETECT",
    "AMS_RX_IMIN_SLICER",
    "AMS_RX_IMIN_VGA",
    "AMS_RX_IMODE_CTAT",
    "AMS_RX_IMODE_DC_OFFSET_DAC",
    "AMS_RX_IMODE_DFE_SUMMER",
    "AMS_RX_IMODE_DFE_TAP_WEIGHT",
    "AMS_RX_IMODE_METRES_EYEDIAG",
    "AMS_RX_IMODE_PF",
    "AMS_RX_IMODE_PHASE_INT",
    "AMS_RX_IMODE_PHASE_INT_P1",
    "AMS_RX_IMODE_SIGNAL_DETECT",
    "AMS_RX_IMODE_SLICER",
    "AMS_RX_IMODE_VGA",
    "AMS_RX_IMOD_COMMONMODE",
    "AMS_RX_PHASE_INT_AMPL_CTRL",
    "AMS_RX_PHS_INTERP_RESCAL_MUX",
    "AMS_RX_SEL_DFECKDELAY",
    "AMS_RX_SEL_TH4DFE",
    "AMS_RX_SEL_UGBW",
    "AMS_RX_SIGDET_BYPASS",
    "AMS_RX_SIGDET_LOW_POWER",
    "AMS_RX_SIGDET_THRESHOLD",
    "AMS_RX_SIG_PWRDN",
    "AMS_RX_SPARE_32",
    "AMS_RX_SPARE_33",
    "AMS_RX_SPARE_34",
    "AMS_RX_SPARE_46",
    "AMS_RX_SPARE_47",
    "AMS_RX_SPARE_62",
    "AMS_RX_SPARE_63",
    "AMS_RX_STS",
    "AMS_RX_TPORT_EN",
    "AMS_RX_VGA_BW_EXTENSION",
    "AMS_RX_VGA_OUTPUT_IDLE",
    "AMS_RX_VGA_RESCAL_MUX",
    "AMS_TX_AMP_CTL",
    "AMS_TX_CAL_AUX",
    "AMS_TX_CAL_OFF",
    "AMS_TX_DCC_DIS",
    "AMS_TX_DCC_SEL",
    "AMS_TX_DRIVERMODE",
    "AMS_TX_ELEC_IDLE_AUX",
    "AMS_TX_IBIAS",
    "AMS_TX_ICML",
    "AMS_TX_IDCC",
    "AMS_TX_KR_TEST_MODE",
    "AMS_TX_LP_OVRD",
    "AMS_TX_OSR4",
    "AMS_TX_POST2_COEF",
    "AMS_TX_POST3_COEF",
    "AMS_TX_SEL_HALFRATE",
    "AMS_TX_SIGN_POST2",
    "AMS_TX_SIGN_POST3",
    "AMS_TX_SPARE_1",
    "AMS_TX_SPARE_2",
    "AMS_TX_SPARE_3",
    "AMS_TX_SPARE_30_25",
    "AMS_TX_STS",
    "AMS_TX_TEST_DATA",
    "AMS_TX_TICKSEL",
    "AM_LOCK",
    "AM_LOCK_HIS_STATE",
    "AM_LOCK_LH",
    "AM_LOCK_LL",
    "AM_LOCK_STATE",
    "AM_TIMER_INIT_RX_VAL",
    "AN",
    "AN_ACTIVE",
    "AN_COMPLETE",
    "AN_COMPLETED_SW",
    "AN_FAIL_COUNT",
    "AN_FAIL_COUNT_LIMIT",
    "AN_GOOD_CHECK_TRAP",
    "AN_GOOD_TRAP",
    "AN_HCD_CL72",
    "AN_HCD_DUPLEX",
    "AN_HCD_FEC",
    "AN_HCD_HIGIG2",
    "AN_HCD_PAUSE",
    "AN_HCD_SPEED",
    "AN_HCD_SWITCH_TO_CL37",
    "AN_PD_TO_CL37_ENABLE",
    "AN_PD_TO_CL37_RETRY_COUNT",
    "AN_PRIORITY_1000M",
    "AN_PRIORITY_100GCR10",
    "AN_PRIORITY_100M",
    "AN_PRIORITY_10GCX1",
    "AN_PRIORITY_10GCX2",
    "AN_PRIORITY_10GCX4",
    "AN_PRIORITY_10GKR",
    "AN_PRIORITY_10GKX4",
    "AN_PRIORITY_10GX2",
    "AN_PRIORITY_10GX4",
    "AN_PRIORITY_10M",
    "AN_PRIORITY_10P5GX2",
    "AN_PRIORITY_12GX4",
    "AN_PRIORITY_12P5GX4",
    "AN_PRIORITY_12P7GX2",
    "AN_PRIORITY_13GX4",
    "AN_PRIORITY_15GX4",
    "AN_PRIORITY_15P75GX2",
    "AN_PRIORITY_16GX4",
    "AN_PRIORITY_1GKX",
    "AN_PRIORITY_20GCR2",
    "AN_PRIORITY_20GCX2",
    "AN_PRIORITY_20GCX4",
    "AN_PRIORITY_20GKR2",
    "AN_PRIORITY_20GX2",
    "AN_PRIORITY_20GX4",
    "AN_PRIORITY_21GX4",
    "AN_PRIORITY_25P45GX4",
    "AN_PRIORITY_2P5GX1",
    "AN_PRIORITY_31P5G",
    "AN_PRIORITY_32P7G",
    "AN_PRIORITY_40GCR4",
    "AN_PRIORITY_40GKR4",
    "AN_PRIORITY_40GX4",
    "AN_PRIORITY_5GX4",
    "AN_PRIORITY_6GX4",
    "AN_RETRY_COUNT",
    "AN_RX_ST_CLK_TRANS_MISS",
    "AN_RX_ST_MV_PAIR",
    "AN_RX_ST_PAGE",
    "AN_RX_ST_PAGE_TOO_LONG",
    "AN_RX_ST_PAGE_TOO_SHORT",
    "AN_RX_ST_PULSE_TOO_LONG",
    "AN_RX_ST_PULSE_TOO_MODERATE",
    "AN_RX_ST_PULSE_TOO_SHORT",
    "AN_RX_ST_RUDI_CONFIG",
    "AN_RX_ST_RUDI_IDLE",
    "AN_RX_ST_RUDI_INVALID",
    "AN_RX_ST_STATE",
    "AN_ST_ABILITY_DETECT",
    "AN_ST_ACK_DETECT",
    "AN_ST_AN_ENABLE",
    "AN_ST_AN_GOOD_CHECK",
    "AN_ST_CL37_COMPLETE",
    "AN_ST_CL73_COMPLETE",
    "AN_ST_COMPLETE_ACK",
    "AN_ST_CONFIG_NONZERO",
    "AN_ST_CONFIG_RESTART",
    "AN_ST_CONSISTENCY_MISMATCH",
    "AN_ST_DISABLE_LINK",
    "AN_ST_ERROR_STATE",
    "AN_ST_HP_MODE",
    "AN_ST_IDLE_DETECT",
    "AN_ST_LINK_OK",
    "AN_ST_NEXT_PAGE_WAIT",
    "AN_ST_RESOLUTION_ERR",
    "AN_ST_RESTART",
    "AN_ST_RX_BP",
    "AN_ST_RX_INVALID_SEQ",
    "AN_ST_RX_MP_MISMATCH",
    "AN_ST_RX_MP_NULL",
    "AN_ST_RX_MP_OUI",
    "AN_ST_RX_MP_OVER1G",
    "AN_ST_RX_NP",
    "AN_ST_RX_NP_TOGGLE_ERR",
    "AN_ST_RX_SGMII_MISMATCH",
    "AN_ST_RX_UP_3",
    "AN_ST_RX_UP_OUI_MATCH",
    "AN_ST_RX_UP_OUI_MISMATCH",
    "AN_ST_SGMII_MODE",
    "B66DEC_CGBAD_EN",
    "B66DEC_DOUT_ERRORS_IF_BAD_SYNC",
    "B66DEC_FAULT_DET",
    "B66DEC_FAULT_DET_EN",
    "B66DEC_KCODE66ERRCOUNT_EN",
    "B66DEC_NOBLOCKLOCK_DOUT_SEL",
    "B66DEC_PROG_TL_CHAR",
    "B66DEC_PROG_TL_EN",
    "B66DEC_SYNCERRCOUNT_EN",
    "BAM_10GBASE_X2",
    "BAM_10GBASE_X2_CX4",
    "BAM_10GBASE_X4",
    "BAM_10GBASE_X4_CX4",
    "BAM_10P5GBASE_X2",
    "BAM_12GBASE_X4",
    "BAM_12P5GBASE_X4",
    "BAM_12P7GBASE_X2",
    "BAM_13GBASE_X4",
    "BAM_15GBASE_X4",
    "BAM_15P75GBASE_X2",
    "BAM_16GBASE_X4",
    "BAM_20GBASE_CR2",
    "BAM_20GBASE_KR2",
    "BAM_20GBASE_X2",
    "BAM_20GBASE_X2_CX4",
    "BAM_20GBASE_X4",
    "BAM_20GBASE_X4_CX4",
    "BAM_21GBASE_X4",
    "BAM_25P455GBASE_X4",
    "BAM_2P5GBASE_X",
    "BAM_31P5GBASE_X4",
    "BAM_32P7GBASE_X4",
    "BAM_40GBASE_X4",
    "BAM_5GBASE_X4",
    "BAM_6GBASE_X4",
    "BASE_1000BASE_KX",
    "BASE_100GBASE_CR10",
    "BASE_10GBASE_KR",
    "BASE_10GBASE_KX4",
    "BASE_40GBASE_CR4",
    "BASE_40GBASE_KR4",
    "BASE_SELECTOR",
    "BERMON_STATE",
    "BER_COUNT_PER_LN",
    "BER_HO",
    "BIP_ERROR_COUNT_PER_LANE",
    "BLOCK_SYNC_MODE",
    "BLOCK_SYNC_MODE_OEN",
    "BONDING",
    "BRCM64B66_DESCRAMBLER_ENABLE",
    "BRCM64B66_DESCRAMBLER_ENABLE_OEN",
    "BRCM_MODE_USE_K20PT5",
    "BR_PD_EN",
    "BURST_ERR_STATUSH",
    "BURST_ERR_STATUSL",
    "BURST_ERR_STATUS_MODE",
    "BYPASS_CL49RXSM",
    "BYPASS_CL82RXSM",
    "BYTE0",
    "BYTE1",
    "CAP_CNT_MASK_EN",
    "CAP_DONE",
    "CAP_DONE_LH_LL",
    "CAP_FORCE_SLOWDOWN",
    "CAP_FORCE_SLOWDOWN_EN",
    "CAP_PASS",
    "CAP_PASS_LH_LL",
    "CAP_RESTART",
    "CAP_RETRY_EN",
    "CAP_SELECT",
    "CAP_SELECT_M",
    "CAP_SELECT_M_EN",
    "CAP_SEQ_CYA",
    "CATCH_ALL_8B10B_DIS",
    "CDR_BWSEL_INTEG_ACQCDR",
    "CDR_BWSEL_INTEG_EEE_ACQCDR",
    "CDR_BWSEL_INTEG_NORM",
    "CDR_BWSEL_PROP_ACQCDR",
    "CDR_BWSEL_PROP_EEE_ACQCDR",
    "CDR_BWSEL_PROP_NORM",
    "CDR_FREQ_EN",
    "CDR_FREQ_OVERRIDE_EN",
    "CDR_FREQ_OVERRIDE_VAL",
    "CDR_FRZ_FRC",
    "CDR_FRZ_FRC_VAL",
    "CDR_INTEG_REG",
    "CDR_INTEG_REG_CLR",
    "CDR_INTEG_SAT_SEL",
    "CDR_LM_OUTOFLOCK",
    "CDR_LM_THR_SEL",
    "CDR_PHASE_ERR",
    "CDR_PHASE_ERR_FRZ",
    "CDR_PHASE_SAT_CTRL",
    "CDR_QPHASE_MULT_EN",
    "CDR_SETTLE_TIMEOUT",
    "CDR_ZERO_POLARITY",
    "CHK_END_EN",
    "CHK_END_EN_OEN",
    "CL36BYTEDELETEMODE",
    "CL36BYTEDELETEMODE_OEN",
    "CL36_BER_EN",
    "CL36_EN",
    "CL36_EN_OEN",
    "CL36_FORCE_COMMA_ALIGN_ENABLE",
    "CL36_SYNCACQ_HIS_STATE_PER_LN",
    "CL36_SYNCACQ_STATE_CODED_PER_LN",
    "CL37_ACK_TIMER_PERIOD",
    "CL37_AN_RESTART",
    "CL37_AN_RESTART_RESET_DISABLE",
    "CL37_BAM_CODE",
    "CL37_BAM_ENABLE",
    "CL37_BAM_TO_SGMII_AUTO_ENABLE",
    "CL37_ENABLE",
    "CL37_ERROR_TIMER_PERIOD",
    "CL37_FULL_DUPLEX",
    "CL37_HALF_DUPLEX",
    "CL37_HIGH_VCO",
    "CL37_NEXT_PAGE",
    "CL37_PAUSE",
    "CL37_RESTART_TIMER_PERIOD",
    "CL37_SGMII_ENABLE",
    "CL37_SW_RESTART_RESET_DISABLE",
    "CL37_SYNC_STATUS_FILTER_TIMER_PERIOD",
    "CL48_CGBAD_EN",
    "CL48_DSWIN64B66B",
    "CL48_DSWIN8B10B",
    "CL48_RX_LF_ENABLE",
    "CL48_RX_LI_ENABLE",
    "CL48_RX_QRSVDCTRL",
    "CL48_RX_RF_ENABLE",
    "CL48_SKEWACQ_STATE_D_0",
    "CL48_SKEWACQ_STATE_D_1",
    "CL48_SKEWACQ_STATE_D_2",
    "CL48_SKEWACQ_STATE_D_3",
    "CL48_SKEWACQ_STATE_L",
    "CL48_SKEW_STATUS",
    "CL48_SYNCACQ_EN",
    "CL48_SYNCACQ_STATE_D_0",
    "CL48_SYNCACQ_STATE_D_1",
    "CL48_SYNCACQ_STATE_D_2",
    "CL48_SYNCACQ_STATE_D_3",
    "CL48_SYNCACQ_STATE_L",
    "CL48_TX_LF_ENABLE",
    "CL48_TX_LI_ENABLE",
    "CL48_TX_QRSVDCTRL",
    "CL48_TX_RF_ENABLE",
    "CL49IEEE_ERRORED_BLOCKS",
    "CL49_BERMON_CURRENT_STATE",
    "CL49_BERMON_HISTORY_STATE",
    "CL49_BER_LIMIT",
    "CL49_BYPASS_TXSM",
    "CL49_INVALID_SH_CNT",
    "CL49_LOW_LATENCY_EN",
    "CL49_LTXSM_STATE",
    "CL49_RXSM_CURRENT_STATE",
    "CL49_RXSM_HISTORY_STATE",
    "CL49_RX_LF_ENABLE",
    "CL49_RX_LI_ENABLE",
    "CL49_RX_RF_ENABLE",
    "CL49_R_TYPE_CODED",
    "CL49_TXSM_STATE",
    "CL49_TX_FAULT_DET",
    "CL49_TX_LF_ENABLE",
    "CL49_TX_LI_ENABLE",
    "CL49_TX_RF_ENABLE",
    "CL49_TX_TL_MODE",
    "CL49_T_TYPE_CODED",
    "CL49_VALID_SH_CNT",
    "CL72",
    "CL72_BAD_MARKER_CNT",
    "CL72_BRK_RING_OSC",
    "CL72_CTRL_FRAME_DLY",
    "CL72_DIS_LP_COEFF_UPDATES_TO_LD",
    "CL72_DIS_MAX_WAIT_TIMER",
    "CL72_DME_CELL_BOUNDARY_CHK",
    "CL72_DOUBLE_CMD_EN",
    "CL72_ENABLE",
    "CL72_EN_MASK",
    "CL72_EN_OEN",
    "CL72_FRAME_LOCK_LH",
    "CL72_FRAME_LOCK_RDY_FOR_CMD_EN",
    "CL72_GOOD_MARKER_CNT",
    "CL72_IEEE_FRAME_LOCK",
    "CL72_IEEE_LD_COEFF_UPDATE",
    "CL72_IEEE_LD_STATUS_REPORT",
    "CL72_IEEE_LP_COEFF_UPDATE",
    "CL72_IEEE_LP_STATUS_REPORT",
    "CL72_IEEE_RECEIVER_STATUS",
    "CL72_IEEE_RESTART_TRAINING",
    "CL72_IEEE_TRAINING_ENABLE",
    "CL72_IEEE_TRAINING_FAILURE",
    "CL72_IEEE_TRAINING_STATUS",
    "CL72_INC_DEC_VAL_SEL",
    "CL72_LD_COEFF_CMD_HIST",
    "CL72_LD_STATUS_PAGE",
    "CL72_LD_XMT_STATUS_LOAD",
    "CL72_LD_XMT_STATUS_OVERRIDE",
    "CL72_LP_CONTROL_PAGE",
    "CL72_OVERRIDE_LD_STATUS_PAGE",
    "CL72_PPM_OFFSET_EN",
    "CL72_RCVD_STATUS_PAGE",
    "CL72_READY_FOR_CMD",
    "CL72_RX_DP_LN_CLK_EN",
    "CL72_RX_TRAINED",
    "CL72_SIGNAL_DETECT",
    "CL72_SIGNAL_DET_FRC",
    "CL72_STRICT_DME_CHK",
    "CL72_STRICT_MARKER_CHK",
    "CL72_TAP_V2_VAL",
    "CL72_TIMER_EN",
    "CL72_TR_COARSE_LOCK",
    "CL72_TX_DP_LN_CLK_EN",
    "CL72_TX_FIR_TAP_MAIN_KR_INIT_VAL",
    "CL72_TX_FIR_TAP_POST_KR_INIT_VAL",
    "CL72_TX_FIR_TAP_PRE_KR_INIT_VAL",
    "CL72_V2_CONSTRAINT_DIS",
    "CL72_XMT_UPDATE_PAGE",
    "CL73_AN_RESTART",
    "CL73_BAM_CODE",
    "CL73_BAM_ENABLE",
    "CL73_BAM_TO_HPAM_AUTO_ENABLE",
    "CL73_ENABLE",
    "CL73_ERROR_TIMER_PERIOD",
    "CL73_HPAM_ENABLE",
    "CL73_LINK_UP_TIMER_PERIOD",
    "CL73_LOW_VCO",
    "CL73_NONCE_MATCH_OVER",
    "CL73_NONCE_MATCH_VAL",
    "CL73_PAGE_TEST_MAX_TIMER",
    "CL73_PAGE_TEST_MIN_TIMER",
    "CL73_PAUSE",
    "CL73_REMOTE_FAULT",
    "CL82_BER_LIMIT",
    "CL82_BYPASS_TXSM",
    "CL82_DSWIN",
    "CL82_DSWIN_100G",
    "CL82_IDLE_DELETION_UNDERFLOW",
    "CL82_INVALID_SH_CNT",
    "CL82_MLD_PHYS_MAP",
    "CL82_MULTI_PIPE_MODE",
    "CL82_RX_LF_ENABLE",
    "CL82_RX_LI_ENABLE",
    "CL82_RX_RF_ENABLE",
    "CL82_TX_LF_ENABLE",
    "CL82_TX_LI_ENABLE",
    "CL82_TX_RF_ENABLE",
    "CL82_VALID_SH_CNT",
    "CLAUSE22",
    "CLOCKCNT0",
    "CLOCKCNT0_OEN",
    "CLOCKCNT1",
    "CLOCKCNT1_OEN",
    "CLR_CRCCNT",
    "CNT_BIN_D_DREG",
    "CNT_BIN_D_MREG",
    "CNT_BIN_M1_MREG",
    "CNT_BIN_M1_PREG",
    "CNT_BIN_P1_DREG",
    "CNT_BIN_P1_PREG",
    "CNT_D_MINUS_M1",
    "CNT_D_MINUS_P1",
    "CORCOUNTH",
    "CORCOUNTL",
    "CORE_DP_H_RSTB",
    "CORE_DP_H_RSTB_OEN",
    "CORE_DP_RESET_STATE",
    "CORE_DP_S_RSTB",
    "CORE_MODE",
    "CORE_MODE_OEN",
    "CORE_MULTICAST_MASK_CONTROL",
    "CORE_REG_RESET_OCCURRED",
    "CORE_S_RSTB",
    "CRCERRCNT",
    "CREDITENABLE",
    "CREDITENABLE_OEN",
    "CREDIT_EN",
    "DBG_CAP_STATE_ONE_HOT",
    "DBG_ENABLE",
    "DBG_ERRH",
    "DBG_ERRL",
    "DBG_ERR_MODE",
    "DBG_FDBCK",
    "DBG_MASK_DIG_LPBK_EN",
    "DBG_PLL_STATE_ONE_HOT",
    "DBG_SLOWDN",
    "DBG_SLOWDN_CHANGE",
    "DC_OFFSET",
    "DECODERMODE",
    "DECODERMODE_OEN",
    "DEC_17B_BURST_GAP_COUNT",
    "DEC_18B_BURST_GAP_COUNT",
    "DEC_19B_BURST_GAP_COUNT",
    "DEC_GAP_COUNT_MODE",
    "DEC_MAX_PM",
    "DEC_PM_MODE",
    "DESC2_MODE",
    "DESC2_MODE_OEN",
    "DESCRAMBLERMODE",
    "DESCRAMBLERMODE_OEN",
    "DESKEWMODE",
    "DESKEWMODE_OEN",
    "DESKEW_1BIT_ERROR",
    "DESKEW_2BIT_ERROR",
    "DESKEW_ADDRESS",
    "DESKEW_DISABLE_ECC",
    "DESKEW_ECC_CORRUPT",
    "DESKEW_HIS_STATE",
    "DESKEW_STATE",
    "DESKEW_STATUS",
    "DESKEW_STATUS_LH",
    "DESKEW_STATUS_LL",
    "DESKEW_TM",
    "DFE_1_ACC_CLR",
    "DFE_1_CMN",
    "DFE_1_CMN_ONLY",
    "DFE_1_E",
    "DFE_1_EN",
    "DFE_1_ERR_GAIN",
    "DFE_1_ERR_SEL",
    "DFE_1_GRADIENT_INVERT",
    "DFE_1_INV_M1",
    "DFE_1_INV_P1",
    "DFE_1_O",
    "DFE_1_PATTERN",
    "DFE_1_PATTERN_BIT_EN",
    "DFE_1_WANTS_NEGATIVE",
    "DFE_2_ACC_CLR",
    "DFE_2_CMN",
    "DFE_2_CMN_ONLY",
    "DFE_2_E",
    "DFE_2_EN",
    "DFE_2_ERR_GAIN",
    "DFE_2_ERR_SEL",
    "DFE_2_GRADIENT_INVERT",
    "DFE_2_INV_M1",
    "DFE_2_INV_P1",
    "DFE_2_O",
    "DFE_2_PATTERN",
    "DFE_2_PATTERN_BIT_EN",
    "DFE_2_SE",
    "DFE_2_SO",
    "DFE_3_ACC_CLR",
    "DFE_3_CMN",
    "DFE_3_EN",
    "DFE_3_ERR_GAIN",
    "DFE_3_ERR_SEL",
    "DFE_3_GRADIENT_INVERT",
    "DFE_3_INV_M1",
    "DFE_3_INV_P1",
    "DFE_3_PATTERN",
    "DFE_3_PATTERN_BIT_EN",
    "DFE_4_ACC_CLR",
    "DFE_4_CMN",
    "DFE_4_EN",
    "DFE_4_ERR_GAIN",
    "DFE_4_ERR_SEL",
    "DFE_4_GRADIENT_INVERT",
    "DFE_4_INV_M1",
    "DFE_4_INV_P1",
    "DFE_4_PATTERN",
    "DFE_4_PATTERN_BIT_EN",
    "DFE_5_ACC_CLR",
    "DFE_5_CMN",
    "DFE_5_EN",
    "DFE_5_ERR_GAIN",
    "DFE_5_ERR_SEL",
    "DFE_5_GRADIENT_INVERT",
    "DFE_5_INV_M1",
    "DFE_5_INV_P1",
    "DFE_5_PATTERN",
    "DFE_5_PATTERN_BIT_EN",
    "DFE_ACC_HYS_EN",
    "DFE_ALLOW_SIMULT",
    "DFE_OFFSET_ADJ_DATA_EVEN",
    "DFE_OFFSET_ADJ_DATA_ODD",
    "DFE_OFFSET_ADJ_M1_EVEN",
    "DFE_OFFSET_ADJ_M1_ODD",
    "DFE_OFFSET_ADJ_P1_EVEN",
    "DFE_OFFSET_ADJ_P1_ODD",
    "DFE_UPDATE_GAIN",
    "DFE_VGA_WRITE_EN",
    "DFE_VGA_WRITE_TAPSEL",
    "DFE_VGA_WRITE_VAL",
    "DIG_LPBK_EN",
    "DIG_LPBK_PD_EARLY_IND",
    "DIG_LPBK_PD_FLT_BYPASS",
    "DIG_LPBK_PD_LATE_IND",
    "DIG_LPBK_PD_MODE",
    "DISABLE_CARRIER_EXTEND",
    "DISABLE_CL49_BERMON",
    "DISABLE_REMOTE_FAULT_REPORTING",
    "DIS_CL82_BERMON",
    "DP_RESET_TX_DISABLE_DIS",
    "DSC_CLR_FRC",
    "DSC_CLR_FRC_VAL",
    "DSC_SM_GP_UC_REQ",
    "DSC_SM_READY_FOR_CMD",
    "DSC_SM_SCRATCH",
    "DSC_STATE",
    "DSC_STATE_EEE_ONE_HOT",
    "DSC_STATE_ONE_HOT",
    "DTE_XS",
    "EEE_ACQ_CDR_TIMEOUT",
    "EEE_ANA_PWR_TIMEOUT",
    "EEE_CDR_SETTLE_TIMEOUT",
    "EEE_HW_TUNE_TIMEOUT",
    "EEE_LFSR_CNT",
    "EEE_MEASURE_CNT",
    "EEE_MEASURE_EN",
    "EEE_MODE_EN",
    "EEE_PHASE_ERR_OFFSET",
    "EEE_PHASE_ERR_OFFSET_EN",
    "EEE_QUIET_FROM_EEE_STATES",
    "EEE_QUIET_RX_AFE_PWRDWN_VAL",
    "ENABLE_TX_LANE",
    "ENCODEMODE",
    "ENCODEMODE_OEN",
    "ENERGY_DETECT",
    "ENERGY_DETECT_CHANGE",
    "ENERGY_DETECT_FRC",
    "ENERGY_DETECT_FRC_VAL",
    "ENERGY_DETECT_MASK_COUNT",
    "EN_DFE_CLK",
    "EN_HGAIN",
    "ERRGEN_EN",
    "ERRORED_BLOCKS_HO",
    "ERRORED_BLOCKS_HO_PRESENT",
    "ERROR_EN_OVR",
    "ERROR_EN_OVR_VAL",
    "ERROR_MASK_15_0",
    "ERROR_MASK_31_16",
    "ERROR_MASK_47_32",
    "ERROR_MASK_63_48",
    "ERROR_MASK_79_64",
    "EXT_LOS_EN",
    "EXT_LOS_INV",
    "FAST_LOCK_EN",
    "FAST_SEARCH_MODE",
    "FEC",
    "FEC_ENABLE",
    "FEC_ENABLE_OEN",
    "FEC_ERROR_CODE_ALL",
    "FEC_ERR_ENABLE",
    "FREQ_DET_RESTART_EN",
    "FREQ_DET_RETRY_EN",
    "FREQ_DONE_SM",
    "FREQ_DONE_SM_LH_LL",
    "FREQ_MONITOR_EN",
    "FREQ_PASS_SM",
    "FREQ_PASS_SM_LH_LL",
    "FREQ_UPD_EN_FRC",
    "FREQ_UPD_EN_FRC_VAL",
    "GBOX_OVERFLOW_ERR",
    "GBOX_UNDERFLOW_ERR",
    "GCWCOUNT",
    "GOOD_PARITY_CNT",
    "HEARTBEAT_COUNT_1US",
    "HG2",
    "HG2_CODEC",
    "HG2_ENABLE",
    "HG2_MESSAGE_INVALID_CODE_ENABLE",
    "HI_BER",
    "HI_BER_LH",
    "HI_BER_LL",
    "HOLD_LOS_COUNT",
    "HOLD_SD_COUNT",
    "HPAM_20GKR2",
    "HPAM_TO_CL73_AUTO_ENABLE",
    "HW_TUNE_EN",
    "HW_TUNE_TIMEOUT",
    "HYSTCOUNT",
    "IGNORE_LINK_TIMER_PERIOD",
    "IGNORE_LP_MODE",
    "IGNORE_RX_MODE",
    "ILKN_SEL",
    "INT_1B",
    "INT_2B",
    "INVALID_PARITY_CNT",
    "INV_RX_ORDER",
    "INV_TX_ORDER",
    "IPG_SIZE",
    "KCODE66ERRCOUNT",
    "LANE_0_AM_1_0",
    "LANE_0_AM_2",
    "LANE_1_AM_1_0",
    "LANE_1_AM_2",
    "LANE_2_AM_1_0",
    "LANE_2_AM_2",
    "LANE_3_AM_1_0",
    "LANE_3_AM_2",
    "LANE_ADDR_0",
    "LANE_ADDR_1",
    "LANE_ADDR_2",
    "LANE_ADDR_3",
    "LANE_DP_RESET_STATE",
    "LANE_MODE",
    "LANE_MODE_OEN",
    "LANE_MULTICAST_MASK_CONTROL",
    "LANE_REG_RESET_OCCURRED",
    "LANE_RESET_RELEASED",
    "LANE_RESET_RELEASED_INDEX",
    "LATCH_LINKDOWN_ENABLE",
    "LBERMON_STATE",
    "LD_CONTROL_VALID",
    "LD_PAGE_0_PAGE_DATA",
    "LD_PAGE_1_PAGE_DATA",
    "LD_PAGE_2_PAGE_DATA",
    "LINKFAILTIMERQUAL_EN",
    "LINKFAILTIMER_DIS",
    "LINK_CONTROL_FORCEVAL",
    "LINK_EN",
    "LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD",
    "LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD",
    "LINK_INTERRUPT",
    "LINK_INTERRUPT_LH",
    "LINK_STATUS",
    "LINK_STATUS_LH",
    "LINK_STATUS_LL",
    "LN_DP_H_RSTB",
    "LN_DP_H_RSTB_OEN",
    "LN_DP_S_RSTB",
    "LN_H_RSTB",
    "LN_RX_DP_S_RSTB",
    "LN_RX_H_PWRDN",
    "LN_RX_S_CLKGATE_FRC_ON",
    "LN_RX_S_COMCLK_FRC_ON",
    "LN_RX_S_COMCLK_SEL",
    "LN_RX_S_PWRDN",
    "LN_RX_S_RSTB",
    "LN_S_RSTB",
    "LN_TX_DP_S_RSTB",
    "LN_TX_H_PWRDN",
    "LN_TX_S_PWRDN",
    "LN_TX_S_RSTB",
    "LOCAL_FAULT",
    "LOCAL_FAULT_LH",
    "LOCAL_PCS_LOOPBACK_ENABLE",
    "LOG0_TO_PHY_LNSWAP_SEL",
    "LOG1_TO_PHY_LNSWAP_SEL",
    "LOG2_TO_PHY_LNSWAP_SEL",
    "LOG3_TO_PHY_LNSWAP_SEL",
    "LOOPCNT0",
    "LOOPCNT0_OEN",
    "LOOPCNT1",
    "LOOPCNT1_OEN",
    "LOST_PLL_LOCK_SM",
    "LOS_FILTER_COUNT",
    "LOS_THRESH",
    "LPI_EN",
    "LPI_ENABLE",
    "LPI_RECEIVED",
    "LPI_RECEIVED_LH",
    "LP_BASE_PAGE1_PAGE_DATA",
    "LP_BASE_PAGE2_PAGE_DATA",
    "LP_BASE_PAGE3_PAGE_DATA",
    "LP_MP1024_UP1_PAGE_DATA",
    "LP_MP1024_UP2_PAGE_DATA",
    "LP_MP1024_UP3_PAGE_DATA",
    "LP_MP1024_UP4_PAGE_DATA",
    "LP_MP5_UP1_PAGE_DATA",
    "LP_MP5_UP2_PAGE_DATA",
    "LP_MP5_UP3_PAGE_DATA",
    "LP_MP5_UP4_PAGE_DATA",
    "LP_PAGE_0_PAGE_DATA",
    "LP_PAGE_1_PAGE_DATA",
    "LP_PAGE_2_PAGE_DATA",
    "LP_STATUS_VALID",
    "LSM_CURR_STATE",
    "LSM_HIS_STATE",
    "LTXSM_STATE",
    "M1_THRESH_SEL",
    "M1_THRESH_ZERO",
    "MAC_CREDITGENCNT",
    "MAC_CREDITGENCNT_OEN",
    "MAIN_TAP_LIMIT",
    "MAIN_TAP_MIN_VAL",
    "MASTER_PORT_NUM",
    "MAX_WAIT_TIMER_PERIOD",
    "MDIO_ADDR_DATA",
    "MDIO_AER",
    "MDIO_BLK_ADDR",
    "MDIO_BRCST_PORT_ADDR",
    "MDIO_DEVAD",
    "MDIO_DEV_AN_EN",
    "MDIO_DEV_CL22_EN",
    "MDIO_DEV_DTE_EN",
    "MDIO_DEV_PCS_EN",
    "MDIO_DEV_PHY_EN",
    "MDIO_DEV_PMD_EN",
    "MDIO_FUNCTION",
    "MDIO_MASKDATA",
    "MDIO_MULTI_MMDS_EN",
    "MDIO_MULTI_PRTS_EN",
    "MEASURE_LFSR_CNT",
    "MEASURE_TIMEOUT",
    "MEAS_INCOMPLETE",
    "MICRO_BYTE_MODE",
    "MICRO_DATARAM_TM",
    "MICRO_DISABLE_ECC",
    "MICRO_ERR0",
    "MICRO_ERR1",
    "MICRO_FSM",
    "MICRO_GEN_STATUS_SEL",
    "MICRO_INIT_CMD",
    "MICRO_INIT_DONE",
    "MICRO_INRUSH_CURRENT_FRC",
    "MICRO_INRUSH_CURRENT_FRC_VAL",
    "MICRO_IRAM_TM",
    "MICRO_MDIO_AUTOWAKEUP",
    "MICRO_MDIO_DW8051_RESET_N",
    "MICRO_MDIO_PROG_RAM_CS_FRC",
    "MICRO_MDIO_PROG_RAM_CS_FRC_VAL",
    "MICRO_MDIO_RAM_ACCESS_MODE",
    "MICRO_MDIO_RAM_READ_AUTOINC_EN",
    "MICRO_MDIO_UC_MAILBOX_LSW",
    "MICRO_MDIO_UC_MAILBOX_MSW",
    "MICRO_PMI_ACK_TIMEOUT_VAL",
    "MICRO_PMI_HP_ACK_FRC",
    "MICRO_PMI_HP_ACK_FRC_VAL",
    "MICRO_PRAM_IF_EN",
    "MICRO_PRAM_IF_FLOP_BYPASS",
    "MICRO_PRAM_IF_RSTB",
    "MICRO_PROGRAM_RAM_TM",
    "MICRO_RAM_ADDRESS",
    "MICRO_RAM_CLK_INVERT",
    "MICRO_RAM_COUNT",
    "MICRO_RAM_RDDATA",
    "MICRO_RAM_WRDATA",
    "MICRO_READ",
    "MICRO_RUN",
    "MICRO_SRST_DW8051_TO_PMI",
    "MICRO_SRST_MDIO_DATARAM_ACCESS",
    "MICRO_SRST_MDIO_LOAD_PROGRAM_RAM",
    "MICRO_SRST_MDIO_PROGRAM_ACCESS",
    "MICRO_STATUS_MUXED",
    "MICRO_STOP",
    "MICRO_SYSTEM_CLK_EN",
    "MICRO_SYSTEM_RESET_N",
    "MICRO_TEMPATURE_DATA",
    "MICRO_TX_DISABLE",
    "MICRO_UC_MDIO_MAILBOX_LSW",
    "MICRO_UC_MDIO_MAILBOX_MSW",
    "MICRO_WRITE",
    "MICRO_ZERO_ROM_DATAOUT",
    "MLD_SWAP_COUNT",
    "MODEL_NUMBER",
    "MSK_1B",
    "MSK_2B",
    "MULTIPRTS_EN",
    "NEXT_PAGE",
    "NUMBER_PKT",
    "NUM_ADVERTISED_LANES",
    "NUM_LANES",
    "NUM_LANES_OEN",
    "NUM_LANES_OVERRIDE_VALUE",
    "OFFSET_FASTACQ",
    "OFFSET_PD",
    "OSR_MODE",
    "OSR_MODE_FRC",
    "OSR_MODE_FRC_VAL",
    "OSR_MODE_OEN",
    "OSR_MODE_PIN",
    "OSX2P_PHERR_GAIN",
    "OS_MODE",
    "OS_MODE_OEN",
    "OUI_CONTROL",
    "OUI_LOWER_DATA",
    "OUI_UPPER_DATA",
    "OVER1G_ABILITY",
    "OVER1G_PAGE_COUNT",
    "P1_EYEDIAG_BIN",
    "P1_EYEDIAG_EN",
    "P1_OFFSET",
    "P1_OFFSET_EN",
    "P1_OFF_3LEVELQ_EN",
    "P1_THRESH_SEL",
    "PATTERN_SEL",
    "PATT_GEN_EN",
    "PATT_GEN_SEQ_0",
    "PATT_GEN_SEQ_1",
    "PATT_GEN_SEQ_10",
    "PATT_GEN_SEQ_11",
    "PATT_GEN_SEQ_12",
    "PATT_GEN_SEQ_13",
    "PATT_GEN_SEQ_14",
    "PATT_GEN_SEQ_2",
    "PATT_GEN_SEQ_3",
    "PATT_GEN_SEQ_4",
    "PATT_GEN_SEQ_5",
    "PATT_GEN_SEQ_6",
    "PATT_GEN_SEQ_7",
    "PATT_GEN_SEQ_8",
    "PATT_GEN_SEQ_9",
    "PATT_GEN_START_POS",
    "PATT_GEN_STOP_POS",
    "PAYLOAD_TYPE",
    "PCS_CLOCKCNT0",
    "PCS_CLOCKCNT0_OEN",
    "PCS_CREDITENABLE",
    "PCS_CREDITENABLE_OEN",
    "PCS_CREDITGENCNT",
    "PCS_CREDITGENCNT_OEN",
    "PCS_XS",
    "PD_CH_P1",
    "PD_CL37_COMPLETED",
    "PD_COMPLETED",
    "PD_DME_LOCK_TIMER_PERIOD",
    "PD_HCD_KX4_OR_KX",
    "PD_IN_PROGRESS",
    "PD_KX4_EN",
    "PD_KX_EN",
    "PD_SD_TIMER_PERIOD",
    "PD_TO_CL37_LINK_WAIT_TIMER",
    "PF2_LOWP_CTRL",
    "PF_CTRL",
    "PF_HIZ",
    "PHASE_ERR_OFFSET",
    "PHASE_ERR_OFFSET_EN",
    "PHASE_ERR_OFFSET_MULT_2",
    "PHY_XS",
    "PIPELINE_RESET_COUNT",
    "PKTGEN_EN",
    "PKT_OR_PRTP",
    "PKT_SIZE",
    "PLL_FORCE_CAP_DONE",
    "PLL_FORCE_CAP_DONE_EN",
    "PLL_FORCE_CAP_PASS",
    "PLL_FORCE_CAP_PASS_EN",
    "PLL_FORCE_FDONE",
    "PLL_FORCE_FDONE_EN",
    "PLL_FORCE_FPASS",
    "PLL_LOCK",
    "PLL_LOCK_FRC",
    "PLL_LOCK_FRC_VAL",
    "PLL_LOCK_LH",
    "PLL_LOCK_LH_LL",
    "PLL_LOCK_LL",
    "PLL_LOCK_OVRD",
    "PLL_LOCK_STS",
    "PLL_LOCK_TIMED_OUT",
    "PLL_LOCK_TIMER_PERIOD",
    "PLL_MODE",
    "PLL_RESET_EN",
    "PLL_SEQ_DONE",
    "PLL_SEQ_DONE_LH_LL",
    "PLL_SEQ_PASS",
    "PLL_SEQ_PASS_LH_LL",
    "PLL_SEQ_START",
    "PMA_PMD",
    "PMD_CORE_DP_H_RSTB_PKILL",
    "PMD_CORE_MODE",
    "PMD_LANE_MODE",
    "PMD_LN_DP_H_RSTB_PKILL",
    "PMD_LN_H_RSTB_PKILL",
    "PMD_LN_RX_H_PWRDN_PKILL",
    "PMD_LN_TX_H_PWRDN_PKILL",
    "PMD_LOCK_TIMED_OUT",
    "PMD_LOCK_TIMER_PERIOD",
    "PMD_MDIO_TRANS_PKILL",
    "PMD_RX_CLK_VLD_FRC",
    "PMD_RX_CLK_VLD_FRC_VAL",
    "PMD_RX_LOCK",
    "PMD_RX_LOCK_CHANGE",
    "PMD_TX_CLK_VLD_FRC",
    "PMD_TX_CLK_VLD_FRC_VAL",
    "PMD_TX_DISABLE_PIN_DIS",
    "PORT_MODE_SEL",
    "POR_H_RSTB",
    "POST_TAP_LIMIT",
    "POST_TAP_PRESET_VAL",
    "PRAM_ABILITY",
    "PRBS_CHK_CLK_EN_FRC_ON",
    "PRBS_CHK_EN",
    "PRBS_CHK_EN_AUTO_MODE",
    "PRBS_CHK_EN_TIMEOUT",
    "PRBS_CHK_EN_TIMER_MODE",
    "PRBS_CHK_ERR_CNT_BURST_MODE",
    "PRBS_CHK_ERR_CNT_LSB",
    "PRBS_CHK_ERR_CNT_MSB",
    "PRBS_CHK_INV",
    "PRBS_CHK_LOCK",
    "PRBS_CHK_LOCK_CNT",
    "PRBS_CHK_LOCK_LOST_LH",
    "PRBS_CHK_MODE",
    "PRBS_CHK_MODE_SEL",
    "PRBS_CHK_OOL_CNT",
    "PRBS_GEN_EN",
    "PRBS_GEN_ERR_INS",
    "PRBS_GEN_INV",
    "PRBS_GEN_MODE_SEL",
    "PRE_FREQ_DET_TIME",
    "PRE_TAP_LIMIT",
    "PRE_TAP_PRESET_VAL",
    "PROG_TL_CHAR",
    "PROG_TL_EN",
    "PRTAD_BCST",
    "PRTP_DATA_PATTERN_SEL",
    "PRTP_ERR_COUNT",
    "PRTP_LOCK",
    "PWRDN_SEQ_TIMER",
    "QRSVD1",
    "QRSVD2_1_0",
    "QRSVD2_8_2",
    "QRSVD3",
    "QRSVDSWAP",
    "REFCLK_DIVCNT",
    "REFCLK_DIVCNT_SEL",
    "REFCLK_SEL",
    "REGID1",
    "REGID2",
    "REMOTE_FAULT",
    "REMOTE_FAULT_IN_BASE_PAGE",
    "REMOTE_FAULT_LH",
    "REMOTE_PCS_LOOPBACK_ENABLE",
    "REMOTE_PMD_LOOPBACK_ENABLE",
    "REORDER_EN",
    "REORDER_EN_OEN",
    "REPLICATION_CNT",
    "REPLICATION_CNT_OEN",
    "RESCAL_FRC",
    "RESCAL_FRC_VAL",
    "RESCAL_IN",
    "RESERVED_ORDERED_BYTE_3",
    "RESERVED_ORDERED_SET_LH",
    "RESOLVED_PORT_MODE",
    "RESTART_PI_EXT_MODE",
    "RESTART_PMD_RESTART",
    "RESTART_SIGDET",
    "RES_CAL_CNTR",
    "RETRY_TIME",
    "REVID2",
    "REVID_BONDING",
    "REVID_CL72",
    "REVID_EEE",
    "REVID_LLP",
    "REVID_MDIO",
    "REVID_MICRO",
    "REVID_MODEL",
    "REVID_MULTIPLICITY",
    "REVID_PIR",
    "REVID_PROCESS",
    "REVID_REV_LETTER",
    "REVID_REV_NUMBER",
    "REV_LETTER",
    "REV_NUMBER",
    "RFEC0_1BIT_ERROR",
    "RFEC0_2BIT_ERROR",
    "RFEC0_ADDRESS",
    "RFEC0_DISABLE_ECC",
    "RFEC0_ECC_CORRUPT",
    "RFEC0_TM",
    "RFEC1_1BIT_ERROR",
    "RFEC1_2BIT_ERROR",
    "RFEC1_ADDRESS",
    "RFEC1_DISABLE_ECC",
    "RFEC1_ECC_CORRUPT",
    "RFEC1_TM",
    "RMLD_STATUS",
    "RMT_LPBK_EN",
    "RMT_LPBK_PD_EARLY_IND",
    "RMT_LPBK_PD_FRC_ON",
    "RMT_LPBK_PD_LATE_IND",
    "RMT_LPBK_PD_MODE",
    "RSTB_LANE",
    "RSTB_TX_LANE",
    "RST_SEQ_DIS_FLT_MODE",
    "RST_SEQ_TIMER",
    "RXFIFO_EMPTY",
    "RXFIFO_FULL",
    "RXFIFO_OVERRUN",
    "RXFIFO_UNDERRUN",
    "RXPKTCNT_L",
    "RXPKTCNT_U",
    "RXSM_STATE",
    "RX_AGGREGATOR_BYPASS_EN",
    "RX_CLK_VLD_LH",
    "RX_CLK_VLD_LL",
    "RX_CLK_VLD_OVRD",
    "RX_CLK_VLD_STS",
    "RX_DME_EN",
    "RX_DME_EN_OEN",
    "RX_DSC_LOCK",
    "RX_DSC_LOCK_FRC",
    "RX_DSC_LOCK_FRC_VAL",
    "RX_GBOX_AFRST_EN",
    "RX_LOCK_LH",
    "RX_LOCK_LL",
    "RX_LOCK_OVRD",
    "RX_LOCK_STS",
    "RX_MODE",
    "RX_MSBUS_TYPE",
    "RX_PI_MANUAL_MODE",
    "RX_PI_MANUAL_RESET",
    "RX_PI_MANUAL_STROBE",
    "RX_PI_PHASE_STEP_CNT",
    "RX_PI_PHASE_STEP_DIR",
    "RX_PI_SLICERS_EN",
    "RX_PKT_CHECK_EN",
    "RX_PMD_DP_INVERT",
    "RX_PORT_SEL",
    "RX_PRTP_EN",
    "RX_RESTART_PMD",
    "RX_RESTART_PMD_HOLD",
    "R_TEST_MODE_CFG",
    "R_TYPE_CODED",
    "SCRAMBLER_EN_MASK",
    "SCR_MODE",
    "SCR_MODE_OEN",
    "SCW0",
    "SCW0_MASK",
    "SCW1",
    "SCW1_MASK",
    "SCW2",
    "SCW2_MASK",
    "SCW3",
    "SCW3_MASK",
    "SCW4",
    "SCW4_MASK",
    "SCWCOUNT",
    "SC_BYPASS",
    "SC_FSM_STATUS",
    "SC_IGNORE_TX_DATA_VLD",
    "SDK_TX_DISABLE",
    "SEEDA0",
    "SEEDA1",
    "SEEDA2",
    "SEEDA3",
    "SEEDB0",
    "SEEDB1",
    "SEEDB2",
    "SEEDB3",
    "SEND_LMS_TO_PCS",
    "SEQ_UNEXPECTED_PAGE",
    "SET_BER_WINDOW_512",
    "SET_MEAS_INCOMPLETE",
    "SGMII_FULL_DUPLEX",
    "SGMII_MASTER_MODE",
    "SGMII_SPD_SWITCH",
    "SGMII_SPD_SWITCH_OEN",
    "SGMII_SPEED",
    "SGMII_TIMER",
    "SGMII_TO_CL37_AUTO_ENABLE",
    "SHIFT_AMMOUNT",
    "SIGDET_DP_RSTB_EN",
    "SIGNAL_DETECT",
    "SIGNAL_DETECT_CHANGE",
    "SIGNAL_DETECT_FILTER_1US",
    "SIGNAL_DETECT_FILTER_COUNT",
    "SIGNAL_DETECT_FRC",
    "SIGNAL_DETECT_FRC_VAL",
    "SIGNAL_DETECT_LH",
    "SIGNAL_DETECT_LL",
    "SIGNAL_DETECT_OVRD",
    "SIGNAL_DETECT_RAW",
    "SIGNAL_DETECT_RAW_CHANGE",
    "SIGNAL_DETECT_STS",
    "SIGNAL_DETECT_THRESH",
    "SINGLE_PORT_MODE",
    "SKEW_STATUS",
    "SLOWDN_XOR",
    "SOFT_RST_RX",
    "SOFT_RST_TX",
    "SPARE0",
    "SPARE1",
    "SPEED",
    "STAND_ALONE_MODE",
    "STATUS_EN",
    "SUP_RST_SEQ_FRC",
    "SUP_RST_SEQ_FRC_VAL",
    "SW_AN",
    "SW_HCD",
    "SW_SPEED",
    "SW_SPEED_CHANGE",
    "SW_SPEED_CHANGE_DONE",
    "SW_SPEED_CONFIG_VLD",
    "SYNC66ERRCOUNT",
    "SYNCE_MODE_PHY_LN0",
    "SYNCE_MODE_PHY_LN1",
    "SYNCE_MODE_PHY_LN2",
    "SYNCE_MODE_PHY_LN3",
    "SYNC_STATUS",
    "SYNC_STATUS_LH",
    "SYNC_STATUS_LL",
    "TAP_SUM_MAX_VAL",
    "TC",
    "TDR_BIT_SEL",
    "TDR_CYCLE_BIN",
    "TDR_CYCLE_SEL",
    "TDR_TRNSUM_EN",
    "TECH_PROC",
    "TICK_DENOMINATOR",
    "TICK_NUMERATOR_LOWER",
    "TICK_NUMERATOR_UPPER",
    "TICK_OVERRIDE",
    "TIMER_DONE_FRC",
    "TIMER_DONE_FRC_VAL",
    "TLA_LN_SEQUENCER_FSM_STATUS",
    "TLA_LN_SEQUENCER_FSM_STATUS1",
    "TRANSMIT_NONCE",
    "TRNSUM_CLR_FRC",
    "TRNSUM_CLR_FRC_VAL",
    "TRNSUM_EN",
    "TRNSUM_ERROR_COUNT_EN",
    "TRNSUM_ERR_SEL",
    "TRNSUM_EYE_CLOSURE_EN",
    "TRNSUM_E_HIGH",
    "TRNSUM_E_LOW",
    "TRNSUM_FRZ_FRC",
    "TRNSUM_FRZ_FRC_VAL",
    "TRNSUM_GAIN",
    "TRNSUM_HIGH",
    "TRNSUM_INV_PATTERN_EN",
    "TRNSUM_LOW",
    "TRNSUM_O_HIGH",
    "TRNSUM_O_LOW",
    "TRNSUM_PATTERN",
    "TRNSUM_PATTERN_BIT_EN",
    "TRNSUM_PATTERN_FULL_CHECK_OFF",
    "TRNSUM_RANDOM_TAPSEL_DISABLE",
    "TRNSUM_TAP_EN",
    "TRNSUM_TAP_RANGE_SEL",
    "TRNSUM_TAP_SIGN",
    "TRNSUM_UNSIGNED_CORR",
    "TRNSUM_UNSIGNED_FLIP",
    "TXFIFO_EMPTY",
    "TXFIFO_FULL",
    "TXFIFO_OVERRUN",
    "TXFIFO_UNDERRUN",
    "TXFIR_MAIN_ADJUSTED",
    "TXFIR_MAIN_AFTER_OVR",
    "TXFIR_MAIN_OFFSET",
    "TXFIR_MAIN_OVERRIDE",
    "TXFIR_OVERRIDE_EN",
    "TXFIR_POST2",
    "TXFIR_POST2_ADJUSTED",
    "TXFIR_POST2_OFFSET",
    "TXFIR_POST3",
    "TXFIR_POST3_ADJUSTED",
    "TXFIR_POST3_OFFSET",
    "TXFIR_POST_ADJUSTED",
    "TXFIR_POST_AFTER_OVR",
    "TXFIR_POST_OFFSET",
    "TXFIR_POST_OVERRIDE",
    "TXFIR_PRE_ADJUSTED",
    "TXFIR_PRE_AFTER_OVR",
    "TXFIR_PRE_OFFSET",
    "TXFIR_PRE_OVERRIDE",
    "TXPKTCNT_L",
    "TXPKTCNT_U",
    "TXSM_STATE",
    "TX_CLK_VLD_LH",
    "TX_CLK_VLD_LL",
    "TX_CLK_VLD_OVRD",
    "TX_CLK_VLD_STS",
    "TX_DISABLE",
    "TX_DISABLE_OEN",
    "TX_DISABLE_OUTPUT_SEL",
    "TX_DISABLE_TIMER_CTRL",
    "TX_DISABLE_TIMER_PERIOD",
    "TX_EEE_ALERT_EN",
    "TX_EEE_QUIET_EN",
    "TX_FIFO_WATERMARK",
    "TX_LANE_MAP_0",
    "TX_LANE_MAP_1",
    "TX_LANE_MAP_2",
    "TX_LANE_MAP_3",
    "TX_LANE_RATE_MISMATCH",
    "TX_LANE_RATE_MISMATCH_VL1",
    "TX_LINK_INTERRUPT",
    "TX_LOCAL_FAULT",
    "TX_LPI_RECEIVED",
    "TX_MODE",
    "TX_MSBUS_TYPE",
    "TX_MUX_SEL_ORDER",
    "TX_PCS_NATIVE_ANA_FRMT_EN",
    "TX_PI_EN",
    "TX_PI_EXT_CTRL_EN",
    "TX_PI_EXT_PHASE_BWSEL_INTEG",
    "TX_PI_FIRST_ORDER_BWSEL_INTEG",
    "TX_PI_FRC_PHASE_STEP_MUX_SEL",
    "TX_PI_FREQ_OVERRIDE_EN",
    "TX_PI_FREQ_OVERRIDE_VAL",
    "TX_PI_FRZ_FRC",
    "TX_PI_FRZ_FRC_VAL",
    "TX_PI_FRZ_MODE",
    "TX_PI_INTEG1_REG",
    "TX_PI_INTEG2_REG",
    "TX_PI_JITTER_FILTER_EN",
    "TX_PI_JIT_AMP",
    "TX_PI_JIT_FREQ_IDX",
    "TX_PI_JIT_SSC_FREQ_MODE",
    "TX_PI_LANE_SEL_FRC",
    "TX_PI_LANE_SEL_FRC_VAL",
    "TX_PI_LOOP_FILTER_STABLE",
    "TX_PI_LOOP_TIMING_SRC_SEL",
    "TX_PI_PHASE_CNTR",
    "TX_PI_PHASE_ERR",
    "TX_PI_PHASE_INVERT",
    "TX_PI_PHASE_OVERRIDE",
    "TX_PI_PHASE_STEP_DIR",
    "TX_PI_PHASE_STEP_NUM",
    "TX_PI_PHASE_STROBE",
    "TX_PI_RESET_CODE_DBG",
    "TX_PI_RMT_LPBK_BYPASS_FLT",
    "TX_PI_SECOND_ORDER_BWSEL_INTEG",
    "TX_PI_SECOND_ORDER_LOOP_EN",
    "TX_PI_SJ_GEN_EN",
    "TX_PI_SSC_GEN_EN",
    "TX_PMD_DP_INVERT",
    "TX_PRTP_EN",
    "TX_REMOTE_FAULT",
    "TX_RESET_COUNT",
    "TX_S_CLKGATE_FRC_ON",
    "TX_S_COMCLK_FRC_ON",
    "TX_S_COMCLK_SEL",
    "TX_TEST_PORT_SEL",
    "T_TYPE_CODED",
    "UC_ACK_CORE_CFG_DONE",
    "UC_ACK_CORE_DP_RESET",
    "UC_ACK_DSC_CONFIG",
    "UC_ACK_DSC_EEE_DONE",
    "UC_ACK_DSC_RESET",
    "UC_ACK_DSC_RESTART",
    "UC_ACK_LANE_CFG_DONE",
    "UC_ACK_LANE_DP_RESET",
    "UC_ACTIVE",
    "UC_DSC_ERROR_FOUND",
    "UC_DSC_GP_UC_REQ",
    "UC_DSC_READY_FOR_CMD",
    "UC_DSC_SCRATCH",
    "UC_DSC_SUPP_INFO",
    "UC_TRNSUM_EN",
    "UC_TUNE_EN",
    "UNCORCOUNTH",
    "UNCORCOUNTL",
    "VCO_DONE_EN",
    "VCO_RST_EN",
    "VCO_START_TIME",
    "VCO_STEP_TIME",
    "VGA3_CTRL_BIN",
    "VGA_ACC_HYS_EN",
    "VGA_BIN",
    "VGA_CTRL_BIN",
    "VGA_EN",
    "VGA_ERR_GAIN",
    "VGA_ERR_SEL",
    "VGA_INV_M1",
    "VGA_INV_P1",
    "VGA_P1_ACC_CLR",
    "VGA_P1_GRADIENT_INVERT",
    "VGA_PATTERN",
    "VGA_PATTERN_BIT_EN",
    "VGA_TABLEMAP_DISABLE",
    "VGA_UPDATE_GAIN",
    "VL_ON_LL_0",
    "VL_ON_LL_1",
    "WAIT_CNTR_LIMIT",
    "WIN_CAL_CNTR",
    "WIS",
    "WM",
};

#endif
#endif
#endif
#endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */



/*******************************************************************************
 *
 * The following is the symbol table itself. 
 * It defines the entries for all registers and memories.
 * It also incorporates the field information for each register and memory if
 * applicable.
 */
static const phymod_symbol_t bcmi_tsce_xgxs_syms[] = {
#ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_TSCE_XGXS
{
	BCMI_TSCE_XGXS_PHYID2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PHYID2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PHYID2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL22_B0_PHYID2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x600d, /* 24589 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PHYID3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PHYID3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PHYID3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL22_B0_PHYID3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8770, /* 34672 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_SETUPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_SETUPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_SETUPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	NULL,
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_SYNCE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_SYNCE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_SYNCE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MAIN0_SYNCE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xaa, /* 170 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_LN_SWPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_LN_SWPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_LN_SWPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MAIN0_LANE_SWAP",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xe4, /* 228 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_DEVINPKG5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_DEVINPKG5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_DEVINPKG5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MAIN0_DEVICEINPKG5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x83, /* 131 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_MISCr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_MISCr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_MISCr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	NULL,
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_TICK_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_TICK_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_TICK_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MAIN0_TICK_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_TICK_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_TICK_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_TICK_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MAIN0_TICK_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_LPBK_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_LPBK_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_LPBK_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MAIN0_LOOPBACK_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_MDIO_BCSTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_MDIO_BCSTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_MDIO_BCSTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MAIN0_MDIO_BROADCAST",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xf800, /* 63488 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MAIN0_SERDESIDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MAIN0_SERDESIDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MAIN0_SERDESIDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	NULL,
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2d2, /* 722 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X1_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X1_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X1_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X1_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X1_MODEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X1_MODEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X1_MODEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	NULL,
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X1_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X1_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X1_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X1_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X1_LATCH_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X1_LATCH_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X1_LATCH_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X1_LATCH_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X1_OVRRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X1_OVRRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X1_OVRRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X1_OVERRIDE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PKTGENCTRL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PKTGENCTRL2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x28, /* 40 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PRTPCTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PRTPCTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PRTPCTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PRTPCONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_CRCERRCNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_CRCERRCNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_CRCERRCNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_CRCERRORCOUNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PRTPERRCTRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PRTPERRCTRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PRTPERRCTRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PRTPERRORCOUNTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PRTPLOCKSTSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PRTPLOCKSTSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PRTPLOCKSTSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PRTPLOCKSTATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDA0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDA0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDA1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDA1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDA2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDA2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDA3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDA3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDA3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDB0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDB0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDB1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDB1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDB2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDB2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PCS_SEEDB3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PCS_SEEDB3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN0_PCS_SEEDB3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_PAYLOADBYTESr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_PAYLOADBYTESr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_PAYLOADBYTESr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN1_PAYLOADBYTES",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_ERRMASK4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN1_ERRORMASK4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_ERRMASK3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN1_ERRORMASK3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_ERRMASK2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN1_ERRORMASK2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_ERRMASK1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN1_ERRORMASK1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PKTGEN_ERRMASK0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PKTGEN_ERRMASK0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PKTGEN1_ERRORMASK0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_INT_1BITr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_INT_1BITr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_INT_1BITr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_INT_1BIT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_INT_2BITr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_INT_2BITr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_INT_2BITr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_INT_2BIT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_MSK_1BITr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_MSK_1BITr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_MSK_1BITr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_MSK_1BIT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_MSK_2BITr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_MSK_2BITr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_MSK_2BITr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_MSK_2BIT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_DISr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_DISr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_DISr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_DISABLE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_CORRUPTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_CORRUPTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_CORRUPTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_CORRUPT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_DESKEW_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_DESKEW_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_DESKEW_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_DESKEW_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_RFEC0_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_RFEC0_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_RFEC0_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_RFEC0_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_ECC_RFEC1_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_ECC_RFEC1_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_ECC_RFEC1_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_ECC_ECC_RFEC1_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_TM_DESKEWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_TM_DESKEWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_TM_DESKEWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_DBG_MEM_TM_DESKEW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_TM_RFEC0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_TM_RFEC0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_TM_RFEC0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_DBG_MEM_TM_RFEC0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MEM_TM_RFEC1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MEM_TM_RFEC1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MEM_TM_RFEC1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MEM_DBG_MEM_TM_RFEC1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MISC_XGXSSTS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MISC_XGXSSTS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MISC_XGXSSTS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MISC_XGXSSTATUS0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MISC_TX_RATE_MISMATCHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MISC_TX_RATE_MISMATCHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MISC_TX_RATE_MISMATCHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	NULL,
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MISC_SCRMBLR_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MISC_SCRMBLR_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MISC_SCRMBLR_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MISC_SCRAMBLER_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1d, /* 29 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MISC_CL72_EN_MASKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MISC_CL72_EN_MASKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MISC_CL72_EN_MASKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MISC_CL72_ENABLE_MASK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xffff, /* 65535 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_RX_AM_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_RX_AM_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_RX_AM_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_SHARED_CL82_RX_AM_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3fff, /* 16383 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_LN_0_AM_BYTE10r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_LN_0_AM_BYTE10r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_LN_0_AM_BYTE10r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_AM_REGS_LANE_0_AM_BYTE10",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7690, /* 30352 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_LN_1_AM_BYTE10r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_LN_1_AM_BYTE10r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_LN_1_AM_BYTE10r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_AM_REGS_LANE_1_AM_BYTE10",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc4f0, /* 50416 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_LANES_1_0_AM_BYTE2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_LANES_1_0_AM_BYTE2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_LANES_1_0_AM_BYTE2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_AM_REGS_LANES_1_0_AM_BYTE2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xe647, /* 58951 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_LN_2_AM_BYTE10r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_LN_2_AM_BYTE10r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_LN_2_AM_BYTE10r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_AM_REGS_TSC_12_LANE_2_AM_BYTE10",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x65c5, /* 26053 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_LN_3_AM_BYTE10r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_LN_3_AM_BYTE10r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_LN_3_AM_BYTE10r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_AM_REGS_TSC_12_LANE_3_AM_BYTE10",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x79a2, /* 31138 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_LANES_3_2_AM_BYTE2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_LANES_3_2_AM_BYTE2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_LANES_3_2_AM_BYTE2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_AM_REGS_TSC_12_LANES_3_2_AM_BYTE2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3d9b, /* 15771 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_DEC_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_DEC_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_DEC_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL0_DECODE_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x101, /* 257 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_DEC_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_DEC_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_DEC_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL0_DECODE_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x6140, /* 24896 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_DESKEW_WINSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_DESKEW_WINSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_DESKEW_WINSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL0_DESKEW_WINDOWS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xee17, /* 60951 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SHCNT_CL49r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SHCNT_CL49r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SHCNT_CL49r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SHCNT_CL49",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4010, /* 16400 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_VALID_SHCNT_CL82r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_VALID_SHCNT_CL82r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_VALID_SHCNT_CL82r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_VALID_SHCNT_CL82",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x400, /* 1024 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_INVALID_SHCNT_CL82r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_INVALID_SHCNT_CL82r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_INVALID_SHCNT_CL82r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_INVALID_SHCNT_CL82",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x41, /* 65 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8090, /* 32912 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa0b0, /* 41136 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc0d0, /* 49360 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xe070, /* 57456 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW0_MASKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW0_MASKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW0_MASKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW0_MASK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xf0f0, /* 61680 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW1_MASKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW1_MASKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW1_MASKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW1_MASK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xf0f0, /* 61680 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW2_MASKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW2_MASKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW2_MASKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW2_MASK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xf0f0, /* 61680 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW3_MASKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW3_MASKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW3_MASKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW3_MASK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xf0f0, /* 61680 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X1_SCW4_MASKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X1_SCW4_MASKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X1_SCW4_MASKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X1_CONTROL1_SCW4_MASK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3, /* 3 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_OUI_UPRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_OUI_UPRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_OUI_UPRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_OUI_UPPER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_OUI_LWRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_OUI_LWRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_OUI_LWRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_OUI_LOWER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_5_0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_5_0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_BAM_SPD_PRI_5_0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_BAM_SPEED_PRI_5_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_11_6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_11_6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_BAM_SPD_PRI_11_6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_BAM_SPEED_PRI_11_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_17_12r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_17_12r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_BAM_SPD_PRI_17_12r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_BAM_SPEED_PRI_17_12",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_23_18r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_23_18r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_BAM_SPD_PRI_23_18r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_BAM_SPEED_PRI_23_18",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_29_24r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_29_24r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_BAM_SPD_PRI_29_24r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_BAM_SPEED_PRI_29_24",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_35_30r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_BAM_SPD_PRI_35_30r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_BAM_SPD_PRI_35_30r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_BAM_SPEED_PRI_35_30",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CFG_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CFG_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CFG_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_CONTROL_CONFIG_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CL37_RESTARTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CL37_RESTARTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CL37_RESTARTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_CL37_RESTART",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CL37_ACKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CL37_ACKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CL37_ACKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_CL37_ACK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CL37_ERRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CL37_ERRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CL37_ERRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_CL37_ERROR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CL73_BRK_LNKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CL73_BRK_LNKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CL73_BRK_LNKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_CL73_BREAK_LINK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CL73_ERRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CL73_ERRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CL73_ERRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_CL73_ERROR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CL73_DME_LOCKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CL73_DME_LOCKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CL73_DME_LOCKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_CL73_DME_LOCK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_LNK_UPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_LNK_UPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_LNK_UPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_LINK_UP",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_LNK_FAIL_INHBT_TMR_CL72r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_CL72",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_NOT_CL72",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_PD_SD_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_PD_SD_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_PD_SD_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_PD_SD_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_CL37_SYNC_STS_FILTER_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_CL37_SYNC_STS_FILTER_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_CL37_SYNC_STS_FILTER_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_CL37_SYNC_STATUS_FILTER_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_PD_TO_CL37_LNK_WAIT_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_PD_TO_CL37_LINK_WAIT_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x6b, /* 107 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_IGNORE_LNK_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_IGNORE_LNK_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_IGNORE_LNK_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_IGNORE_LINK_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_DME_PAGE_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_DME_PAGE_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_DME_PAGE_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_DME_PAGE_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3b5f, /* 15199 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X1_SGMII_CL73_TMR_TYPEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X1_SGMII_CL73_TMR_TYPEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X1_SGMII_CL73_TMR_TYPEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X1_TIMERS_SGMII_CL73_TIMER_TYPE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x6b, /* 107 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_PLL_LOCK_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_PLL_LOCK_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_PLL_LOCK_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_CONTROL_PLL_LOCK_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_PMD_LOCK_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_PMD_LOCK_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_PMD_LOCK_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_CONTROL_PMD_LOCK_TIMER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_PIPE_RST_CNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_PIPE_RST_CNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_PIPE_RST_CNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_CONTROL_PIPELINE_RESET_COUNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff, /* 255 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_TX_RST_CNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_TX_RST_CNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_TX_RST_CNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_CONTROL_TX_RESET_COUNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_CONTROL_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_SPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_SPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_SPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_SPEED",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x400, /* 1024 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR0_8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR0_8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE0_OVERRIDE_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_SPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_SPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_SPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_SPEED",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x400, /* 1024 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR1_8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR1_8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE1_OVERRIDE_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_SPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_SPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_SPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_SPEED",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x400, /* 1024 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR2_8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR2_8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE2_OVERRIDE_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_SPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_SPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_SPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_SPEED",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x400, /* 1024 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X1_SPD_OVRR3_8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X1_SPD_OVRR3_8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X1_SPEED_OVERRIDE3_OVERRIDE_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X2_MLD_SWP_CNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X2_MLD_SWP_CNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X2_MLD_SWP_CNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X2_CONTROL0_MLD_SWAP_COUNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7ffe, /* 32766 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X2_CL48_0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X2_CL48_0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X2_CL48_0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X2_CONTROL0_CL48_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X2_CL82_0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X2_CL82_0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X2_CL82_0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X2_CONTROL0_CL82_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x70, /* 112 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X2_BRCM_MODEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X2_BRCM_MODEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X2_BRCM_MODEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X2_CONTROL0_BRCM_MODE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x64, /* 100 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X2_CL82_TX_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X2_CL82_TX_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X2_CL82_TX_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X2_STATUS0_CL82_TX_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X2_QRSVD0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X2_QRSVD0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X2_QRSVD0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X2_CONTROL0_QRSVD_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X2_QRSVD1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X2_QRSVD1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X2_QRSVD1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X2_CONTROL0_QRSVD_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X2_QRSVD2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X2_QRSVD2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X2_QRSVD2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X2_CONTROL0_QRSVD_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X2_MISC0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X2_MISC0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X2_MISC0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X2_CONTROL0_MISC_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1400, /* 5120 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X2_MISC1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X2_MISC1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X2_MISC1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X2_CONTROL0_MISC_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x30f, /* 783 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X2_SKEW_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X2_SKEW_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X2_SKEW_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X2_STATUS0_SKEW_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X2_SKEW_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X2_SKEW_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X2_SKEW_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X2_STATUS0_SKEW_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_RX_DECR_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_RX_DECR_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_RX_DECR_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_RX_DECODER_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_RX_DESKEW_BER_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_RX_DESKEW_BER_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_RX_DESKEW_BER_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_RX_DESKEW_BER_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_BER_HO_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_BER_HO_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_BER_HO_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_BER_HO_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL82_PCS_ERRED_BLKS_HOr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL82_PCS_ERRED_BLKS_HOr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL82_PCS_ERRED_BLKS_HOr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL82_PCS_ERRORED_BLOCKS_HO",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X4_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X4_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X4_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X4_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X4_MODEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X4_MODEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X4_MODEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	NULL,
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X4_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X4_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X4_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X4_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X4_LATCH_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X4_LATCH_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X4_LATCH_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X4_LATCH_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X4_OVRRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X4_OVRRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X4_OVRRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X4_OVERRIDE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X4_EEE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X4_EEE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X4_EEE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X4_EEE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PMD_X4_EEE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PMD_X4_EEE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PMD_X4_EEE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PMD_X4_EEE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_TXPKTCNT_Ur,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_TXPKTCNT_Ur_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_TXPKTCNT_Ur",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATGEN1_TXPKTCNT_U",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_TXPKTCNT_Lr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_TXPKTCNT_Lr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_TXPKTCNT_Lr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATGEN1_TXPKTCNT_L",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_RXPKTCNT_Ur,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_RXPKTCNT_Ur_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_RXPKTCNT_Ur",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATGEN1_RXPKTCNT_U",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_RXPKTCNT_Lr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_RXPKTCNT_Lr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_RXPKTCNT_Lr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATGEN1_RXPKTCNT_L",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_CONTROL_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff, /* 255 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_CONTROL_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_ERRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_ERRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_ERRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_CONTROL_ERROR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_DBGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_DBGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_DBGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_CONTROL_DEBUG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_LN_NUM_OVRRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_LN_NUM_OVRRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_LN_NUM_OVRRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_CONTROL_LANE_NUM_OVERRIDE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_BYPASSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_BYPASSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_BYPASSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_CONTROL_BYPASS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_FLD_OVRR_EN0_TYPEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_FLD_OVRR_EN0_TYPEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_FLD_OVRR_EN0_TYPEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FIELD_OVERRIDE_ENABLE_FIELD_OVERRIDE_ENABLE0_TYPE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_FLD_OVRR_EN1_TYPEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_FLD_OVRR_EN1_TYPEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_FLD_OVRR_EN1_TYPEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FIELD_OVERRIDE_ENABLE_FIELD_OVERRIDE_ENABLE1_TYPE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD_SPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD_SPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD_SPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_SPEED",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x400, /* 1024 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SC_X4_RSLVD8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SC_X4_RSLVD8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SC_X4_RSLVD8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_CRED0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_CRED0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_CRED0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CREDIT0_CREDIT0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_CRED1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_CRED1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_CRED1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CREDIT0_CREDIT1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_LOOPCNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_LOOPCNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_LOOPCNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CREDIT0_LOOPCNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_MAC_CREDGENCNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_MAC_CREDGENCNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_MAC_CREDGENCNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CREDIT0_MAC_CREDITGENCNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_PCS_CLKCNT0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_PCS_CLKCNT0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_PCS_CLKCNT0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CREDIT0_PCS_CLOCKCNT0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_PCS_CREDGENCNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_PCS_CREDGENCNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_PCS_CREDGENCNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CREDIT0_PCS_CREDITGENCNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_ENC0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_ENC0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_ENC0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CONTROL0_ENCODE_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x800, /* 2048 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_ENC1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_ENC1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_ENC1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CONTROL0_ENCODE_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1b4, /* 436 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_MISCr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_MISCr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_MISCr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_CONTROL0_MISC",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1c8, /* 456 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_ENC_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_ENC_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_ENC_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_STATUS0_ENCODE_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_X4_PCS_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_X4_PCS_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_X4_PCS_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_X4_STATUS0_PCS_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_PCS_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_PCS_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_PCS_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_PCS_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_FEC_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_FEC_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4478, /* 17528 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_FEC_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7828, /* 30760 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_DECODE_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2870, /* 10352 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_DECODE_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_CL36_RX0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_CL36_RX0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_CL36_RX0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_CL36_RX_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_PMA_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_PMA_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_PMA_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_PMA_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_LNK_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_LNK_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_LNK_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_LINK_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_DBG_ERRLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_DBG_ERRLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_DBG_ERRLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_FEC_DBG_ERRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_DBG_ERRAHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_DBG_ERRAHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_DBG_ERRAHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_FEC_DBG_ERRAH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_BURST_ERR_STSLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_BURST_ERR_STSLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_BURST_ERR_STSLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_FEC_BURST_ERR_STATUSL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_BURST_ERR_STSHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_BURST_ERR_STSHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_BURST_ERR_STSHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_FEC_BURST_ERR_STATUSH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_BARREL_SHIFTER_STr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_BARREL_SHIFTER_STr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_BARREL_SHIFTER_STr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_BARREL_SHIFTER_STATE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_CL49_LOCK_FSM_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_CL49_LOCK_FSM_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_CL49_LOCK_FSM_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_CL49_LOCK_FSM_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_DECODE_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_DECODE_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_STS2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_STS2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_STS2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_DECODE_STATUS_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_STS3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_STS3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_STS3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_DECODE_STATUS_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_STS4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_STS4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_STS4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_DECODE_STATUS_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_DEC_STS5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_DEC_STS5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_DEC_STS5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_DECODE_STATUS_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_SYNCACQ_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_SYNCACQ_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_SYNCACQ_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_SYNCACQ_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_SYNCACQ_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_SYNCACQ_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_SYNCACQ_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_SYNCACQ_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_BERCNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_BERCNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_BERCNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_BERCOUNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_PCS_LATCH_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_PCS_LATCH_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_PCS_LATCH_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_PCS_LATCHED_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_PCS_LATCH_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_PCS_LATCH_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_PCS_LATCH_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_PCS_LATCHED_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_PCS_LIVE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_PCS_LIVE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_PCS_LIVE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_PCS_LIVE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_CL82_AM_LATCH_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_CL82_AM_LATCH_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_CL82_AM_LATCH_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_CL82_RX_AM_LATCHED_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_CL82_AM_LIVE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_CL82_AM_LIVE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_CL82_AM_LIVE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_CL82_RX_AM_LIVE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_CORRBLKSLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_CORRBLKSLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_CORRBLKSLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_FEC_CORRECTEDBLKSL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_CORRBLKSHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_CORRBLKSHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_CORRBLKSHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_FEC_CORRECTEDBLKSH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_UNCORRBLKSLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_UNCORRBLKSLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_UNCORRBLKSLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_FEC_UNCORRECTEDBLKSL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_FEC_UNCORRBLKSHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_FEC_UNCORRBLKSHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_FEC_UNCORRBLKSHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_FEC_UNCORRECTEDBLKSH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_GBOX_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_GBOX_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_GBOX_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS1_GBOX_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_TSC_12_FEC_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_TSC_12_FEC_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4478, /* 17528 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_CONTROL0_TSC_12_FEC_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7828, /* 30760 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_DBG_ERRLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_DBG_ERRLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_DBG_ERRLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_DBG_ERRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_DBG_ERRAHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_DBG_ERRAHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_DBG_ERRAHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_DBG_ERRAH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_BURST_ERR_STSLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_BURST_ERR_STSLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_BURST_ERR_STSLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_BURST_ERR_STATUSL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_BURST_ERR_STSHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_BURST_ERR_STSHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_BURST_ERR_STSHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_BURST_ERR_STATUSH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_BERCNTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_BERCNTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_BERCNTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_BERCOUNT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_CL49_LOCK_FSM_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_CL49_LOCK_FSM_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_CL49_LOCK_FSM_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_CL49_LOCK_FSM_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_MLD_VL_INFO0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_MLD_VL_INFO0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_MLD_VL_INFO0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_MLD_VL_INFO_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_BARREL_SHIFTER_STr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_BARREL_SHIFTER_STr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_BARREL_SHIFTER_STr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_BARREL_SHIFTER_STATE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_CORRBLKSLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_CORRBLKSLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_CORRBLKSLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_CORRECTEDBLKSL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_CORRBLKSHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_CORRBLKSHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_CORRBLKSHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_CORRECTEDBLKSH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_UNCORRBLKSLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_UNCORRBLKSLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_UNCORRBLKSLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_UNCORRECTEDBLKSL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_UNCORRBLKSHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_FEC_UNCORRBLKSHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_FEC_UNCORRBLKSHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_FEC_UNCORRECTEDBLKSH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_CL82_PCS_LATCH_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_CL82_PCS_LATCH_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_CL82_PCS_LATCH_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_CL82_PCS_LATCHED_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_RX_X4_T12_CL82_PCS_LIVE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_RX_X4_T12_CL82_PCS_LIVE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"RX_X4_T12_CL82_PCS_LIVE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"RX_X4_STATUS0_TSC_12_CL82_PCS_LIVE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_ENSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_ENSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_ENSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_ENABLES",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL37_BASE_ABILr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL37_BASE_ABILr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LOC_DEV_CL37_BASE_ABILr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_LOCAL_DEVICE_CL37_BASE_ABILITIES",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL37_BAM_ABILr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL37_BAM_ABILr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LOC_DEV_CL37_BAM_ABILr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_LOCAL_DEVICE_CL37_BAM_ABILITIES",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LOC_DEV_OVER1G_ABIL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_LOCAL_DEVICE_OVER1G_ABILITIES_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LOC_DEV_OVER1G_ABIL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_LOCAL_DEVICE_OVER1G_ABILITIES_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LOC_DEV_CL73_BASE_ABIL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BASE_ABILITIES_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2a0, /* 672 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LOC_DEV_CL73_BASE_ABIL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BASE_ABILITIES_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BAM_ABILr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LOC_DEV_CL73_BAM_ABILr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LOC_DEV_CL73_BAM_ABILr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BAM_ABILITIES",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_CTLSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_CTLSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_CTLSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_ABILITIES_CONTROLS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP5_UP1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP5_UP1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP5_UP2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP5_UP2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP5_UP3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP5_UP3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP5_UP4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP5_UP4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP5_UP4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP1024_UP1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP1024_UP1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP1024_UP2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP1024_UP2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP1024_UP3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP1024_UP3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_MP1024_UP4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_MP1024_UP4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_MP1024_UP4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_BASE_PAGE1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_BASE_PAGE1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_BASE_PAGE2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_BASE_PAGE2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_BASE_PAGE3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_BASE_PAGE3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_HW_LP_PAGES_LP_BASE_PAGE3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LD_PAGE2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LD_PAGE2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LD_PAGE2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_LD_PAGE_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LD_PAGE1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LD_PAGE1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LD_PAGE1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_LD_PAGE_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LD_PAGE0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LD_PAGE0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LD_PAGE0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_LD_PAGE_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_PAGE2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_PAGE2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_PAGE2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_LP_PAGE_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_PAGE1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_PAGE1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_PAGE1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_LP_PAGE_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LP_PAGE0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LP_PAGE0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LP_PAGE0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_LP_PAGE_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_SW_CTL_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_SW_CTL_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_SW_CTL_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_SW_CONTROL_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_LD_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_LD_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_LD_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_LD_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_AN_PAGE_SEQUENCER_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_AN_PAGE_SEQUENCER_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_AN_PAGE_SEQUENCER_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_AN_PAGE_SEQUENCER_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_AN_PAGE_EXCHANGEER_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_AN_PAGE_EXCHANGEER_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_AN_PAGE_EXCHANGEER_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_AN_PAGE_EXCHANGEER_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_AN_PAGE_DECR_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_AN_PAGE_DECR_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_AN_PAGE_DECR_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_AN_PAGE_DECODER_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_AN_ABIL_RESOLUTION_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_AN_ABILITY_RESOLUTION_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_AN_MISC_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_AN_MISC_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_AN_MISC_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_AN_MISC_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_TLA_SEQUENCER_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_TLA_SEQUENCER_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_TLA_SEQUENCER_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_TLA_SEQUENCER_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AN_X4_AN_SEQ_UNEXPECTED_PAGEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AN_X4_AN_SEQ_UNEXPECTED_PAGEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AN_X4_AN_SEQ_UNEXPECTED_PAGEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AN_X4_SW_MANAGEMENT_AN_SEQ_UNEXPECTED_PAGE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_LNK_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_LNK_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_LNK_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_LINK_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_CTL1000X2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_CTL1000X2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_CTL1000X2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIGITAL_CONTROL1000X2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_SPARE0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_SPARE0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_SPARE0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIGITAL_SPARE0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_SPARE1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_SPARE1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_SPARE1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIGITAL_SPARE1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_ILKN_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_ILKN_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"ILKN_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"ILKN_CONTROL0_ILKN_CONTROL0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_ILKN_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_ILKN_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"ILKN_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"ILKN_STATUS0_ILKN_STATUS0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x11, /* 17 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_ACC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_ACC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"ACC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_CL22_IEEE_COM_ACC_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_ACC_ADDR_DATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_ACC_ADDR_DATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"ACC_ADDR_DATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_CL22_IEEE_COM_ACC_ADDR_DATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXBASE_R_PMD_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXBASE_R_PMD_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_PMD_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_PMD_CONTROL_REGISTER_150",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXBASE_R_PMD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXBASE_R_PMD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_PMD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_PMD_STATUS_REGISTER_151",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXBASE_R_LP_COEFF_UPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXBASE_R_LP_COEFF_UPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_LP_COEFF_UPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_LP_COEFF_UPDATE_REGISTER_152",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_RXBASE_R_LD_STS_REPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_RXBASE_R_LD_STS_REPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXBASE_R_LD_STS_REPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_RX_BASE_R_LD_STATUS_REPORT_REGISTER_153",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXBASE_R_LD_COEFF_UPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXBASE_R_LD_COEFF_UPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_LD_COEFF_UPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_LD_COEFF_UPDATE_REGISTER_154",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXBASE_R_LD_STS_REPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXBASE_R_LD_STS_REPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_LD_STS_REPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_LD_STATUS_REPORT_REGISTER_155",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_CDR_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_CDR_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_CDR_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_CDR_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x690, /* 1680 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_CDR_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_CDR_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xf0, /* 240 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_RX_PI_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_RX_PI_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_CDR_STS_INTEGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_CDR_STS_INTEGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_STS_INTEGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_STATUS_INTEG_REG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_CDR_STS_PHASE_ERRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_CDR_STS_PHASE_ERRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_STS_PHASE_ERRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_STATUS_PHASE_ERROR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x100, /* 256 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Dr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CNT_BIN_Dr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CNT_BIN_D",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Pr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CNT_BIN_Pr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CNT_BIN_P",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2000, /* 8192 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Mr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_RX_PI_CNT_BIN_Mr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CNT_BIN_Mr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CNT_BIN_M",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x20, /* 32 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_RX_PI_DIFF_BINr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_RX_PI_DIFF_BINr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_DIFF_BINr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_DIFF_BIN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_TRNSUM_CNTL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_UC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_UC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_UC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_DSC_UC_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SCRATCHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SCRATCHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SCRATCHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_DSC_SCRATCH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8, /* 8 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x200, /* 512 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x87, /* 135 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1c1e, /* 7198 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x35ad, /* 13741 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x35ad, /* 13741 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x340d, /* 13325 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x11, /* 17 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_CTL9r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_CTL9r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL9r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_9",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_LOCKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_LOCKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_LOCKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_LOCK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_ST_ONE_HOTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_STATE_ONE_HOT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_ST_EEE_ONE_HOTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_STATE_EEE_ONE_HOT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_STS_RESTARTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_STS_RESTARTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_RESTARTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_RESTART",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_STr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_SM_STS_DSC_STr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_STr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_STATE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_COMMON_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_COMMON_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_COMMON_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_COMMON_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_1_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_1_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_1_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_1_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_1_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_1_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_1_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_1_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_2_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_2_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_2_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_2_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_2_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_2_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_2_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_2_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_3_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_3_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_3_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_3_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_3_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_3_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_3_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_3_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_4_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_4_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_4_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_4_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_4_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_4_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_4_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_4_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_5_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_5_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_5_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_5_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_5_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_5_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_5_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_5_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_VGA_OVRRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_VGA_OVRRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_VGA_OVRRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_VGA_OVERRIDE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_VGA_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_VGA_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_VGA_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_PAT_EYEDIAG_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_VGA_PAT_EYEDIAG_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_P1_FRAC_OFFS_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_P1_FRAC_OFFS_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_P1_FRAC_OFFS_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_P1_FRAC_OFFS_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_TRNSUM_STS6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_VGA_P1EYEDIAG_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_VGA_P1EYEDIAG_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_P1EYEDIAG_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_VGA_P1EYEDIAG_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_1_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_1_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_1_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_DFE_1_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_2_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_2_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_2_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_DFE_2_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DFE_3_4_5_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DFE_3_4_5_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_3_4_5_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_DFE_3_4_5_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_VGA_TAP_BINr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_VGA_TAP_BINr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_TAP_BINr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_VGA_TAP_BIN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x20, /* 32 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_PF_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_PF_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_PF_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_PF_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_PF2_LOWP_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_PF2_LOWP_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_PF2_LOWP_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_PF2_LOWP_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_DATA_ODDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_DATA_ODDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_DATA_ODDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_DATA_ODD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_DATA_EVENr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_DATA_EVENr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_DATA_EVENr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_DATA_EVEN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_P1_ODDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_P1_ODDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_P1_ODDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_P1_ODD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_P1_EVENr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_P1_EVENr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_P1_EVENr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_P1_EVEN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_M1_ODDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_M1_ODDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_M1_ODDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_M1_ODD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_M1_EVENr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_OFFS_ADJ_M1_EVENr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_M1_EVENr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_M1_EVEN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DSC_DC_OFFSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DSC_DC_OFFSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DC_OFFSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_DC_OFFSET",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_RXRCVD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_RXRCVD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXRCVD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_RCVD_STATUS_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_RXMISC1_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_RXMISC1_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXMISC1_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_MISC1_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_RXDBG2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_RXDBG2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXDBG2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_DEBUG_2_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x96, /* 150 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_RXCL72_LP_CTL_PAGEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_RXCL72_LP_CTL_PAGEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXCL72_LP_CTL_PAGEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_CL72_LP_CONTROL_PAGE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_RXCL72_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_RXCL72_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXCL72_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_CL72_STATUS1_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXXMT_UPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXXMT_UPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXXMT_UPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_XMT_UPDATE_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXMISC2_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXMISC2_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXMISC2_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_MISC2_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXDBG3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXDBG3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXDBG3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_DEBUG_3_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXPCS_INTERFACE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXPCS_INTERFACE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXPCS_INTERFACE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_PCS_INTERFACE_CONTROL_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXCL72_LD_STS_PAGEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXCL72_LD_STS_PAGEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_LD_STS_PAGEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_LD_STATUS_PAGE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXCL72_READY_FOR_CMDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXCL72_READY_FOR_CMDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_READY_FOR_CMDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_READY_FOR_CMD_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXKR_DFLT_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXKR_DFLT_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXKR_DFLT_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_KR_DEFAULT_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXKR_DFLT_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXKR_DFLT_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXKR_DFLT_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_KR_DEFAULT_CONTROL2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXMISC_COEFF_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXMISC_COEFF_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXMISC_COEFF_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_MISC_COEFF_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x83, /* 131 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_LD_XMT_STATUS_PAGE_OVERRIDE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXCL72_TX_DBG_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXCL72_TX_DBG_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_TX_DBG_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_TX_DEBUG_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2000, /* 8192 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x100, /* 256 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_STS2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_STS2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TX_PI_STS3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TX_PI_STS3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_OSR_MODE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_OSR_MODE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_OSR_MODE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_OSR_MODE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_CLK_RST_N_PWRDWN_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_CLK_RST_N_PWRDWN_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_CLK_RST_N_PWRDWN_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_DBG_RST_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_DBG_RST_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_DBG_RST_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_DEBUG_RESET_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x303, /* 771 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_UC_ACK_LN_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_UC_ACK_LN_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_UC_ACK_LN_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_UC_ACK_LANE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_RST_OCC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_RST_OCC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_RST_OCC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_REG_RESET_OCCURRED_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_CLK_N_RST_DBG_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_CLK_N_RST_DBG_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_CLK_N_RST_DBG_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_CLOCK_N_RESET_DEBUG_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_PMD_LN_MODE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_PMD_LN_MODE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_PMD_LN_MODE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_PMD_LANE_MODE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_DP_RST_ST_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_DP_RST_ST_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_DP_RST_ST_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_DP_RESET_STATE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7, /* 7 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_MCST_MASK_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_MCST_MASK_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_MCST_MASK_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_MULTICAST_MASK_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_OSR_MODE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_OSR_MODE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_OSR_MODE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_OSR_MODE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_OSR_MODE_PIN_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_OSR_MODE_PIN_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_OSR_MODE_PIN_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_OSR_MODE_PIN_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CKRST_LN_S_RSTB_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CKRST_LN_S_RSTB_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_S_RSTB_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LN_S_RSTB_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_RX_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_RX_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x10, /* 16 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_RX_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_RX_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_RX_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_RX_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2800, /* 10240 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_RX_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_RX_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_RX_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_RX_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_RX_INTCTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_RX_INTCTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_INTCTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_INTCTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_RX_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_RX_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_TX_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_TX_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x80, /* 128 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_TX_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_TX_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_TX_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_TX_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc, /* 12 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_TX_INTCTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_TX_INTCTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_INTCTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_INTCTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_TX_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_TX_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8001, /* 32769 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x16, /* 22 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x77, /* 119 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7bc0, /* 31680 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x45c0, /* 17856 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_CTL8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_CTL8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_INTCTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_INTCTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_INTCTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_INTCTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_AMS_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_AMS_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x300a, /* 12298 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SIGDET_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SIGDET_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_CTRL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1109, /* 4361 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SIGDET_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SIGDET_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_CTRL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa008, /* 40968 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SIGDET_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SIGDET_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_CTRL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3f22, /* 16162 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_SIGDET_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_SIGDET_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x200, /* 512 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_CNT_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_CNT_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x602, /* 1538 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa, /* 10 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_DIG_LPBK_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_DIG_LPBK_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_DIG_LPBK_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_DIG_LPBK_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x6, /* 6 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_TLB_RX_MISC_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_TLB_RX_MISC_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_TLB_RX_MISC_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_EN_TMR_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_EN_TIMER_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_DIG_LPBK_PD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_DIG_LPBK_PD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_DIG_LPBK_PD_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_LOCK_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_LOCK_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_ERR_CNT_MSB_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_ERR_CNT_LSB_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_RX_PMD_RX_LOCK_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PMD_RX_LOCK_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PMD_RX_LOCK_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_TX_PATGEN_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_TX_PATGEN_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_PATGEN_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_PATT_GEN_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xb000, /* 45056 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_TX_PRBS_GEN_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_TX_PRBS_GEN_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_PRBS_GEN_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_PRBS_GEN_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa, /* 10 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_TX_RMT_LPBK_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_TX_RMT_LPBK_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_RMT_LPBK_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_RMT_LPBK_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_TX_TLB_TX_MISC_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_TLB_TX_MISC_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_TLB_TX_MISC_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_TX_TX_PI_LOOP_TIMING_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_TX_TX_PI_LOOP_TIMING_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_TX_PI_LOOP_TIMING_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_TX_PI_LOOP_TIMING_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TLB_TX_RMT_LPBK_PD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_RMT_LPBK_PD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_RMT_LPBK_PD_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_REVID0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_REVID0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_REVID0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_REVID0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2da, /* 730 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_RST_CTL_PMDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_RST_CTL_PMDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_RST_CTL_PMDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_RESET_CONTROL_PMD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_RST_CTL_CORE_DPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_RST_CTL_CORE_DPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_RST_CTL_CORE_DPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_RESET_CONTROL_CORE_DP",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4000, /* 16384 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_CORE_MCST_MASK_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_CORE_MCST_MASK_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_CORE_MCST_MASK_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_CORE_MULTICAST_MASK_CONRTOL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_TOP_USER_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_TOP_USER_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_TOP_USER_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_TOP_USER_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x271, /* 625 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_UC_ACK_CORE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_UC_ACK_CORE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_UC_ACK_CORE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_UC_ACK_CORE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_CORE_RST_OCC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_CORE_RST_OCC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_CORE_RST_OCC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_CORE_REG_RESET_OCCURRED_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_RST_SEQ_TMR_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_RST_SEQ_TMR_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_RST_SEQ_TMR_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_RST_SEQ_TIMER_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8304, /* 33540 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_CORE_DP_RST_ST_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_CORE_DP_RST_ST_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_CORE_DP_RST_ST_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_CORE_DP_RESET_STATE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7, /* 7 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_PMD_CORE_MODE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_PMD_CORE_MODE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_PMD_CORE_MODE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_PMD_CORE_MODE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_REVID1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_REVID1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_REVID1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_REVID1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4038, /* 16440 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_TX_LN_MAP_0_1_2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_TX_LN_MAP_0_1_2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_TX_LN_MAP_0_1_2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_TX_LANE_MAP_0_1_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x820, /* 2080 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_TX_LANE_MAP_3_N_LANE_ADDR_0_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x403, /* 1027 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_LN_ADDR_2_3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_LN_ADDR_2_3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_LN_ADDR_2_3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_LANE_ADDR_2_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x302, /* 770 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_DIG_REVID2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_DIG_REVID2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_REVID2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_REVID2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ9r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ9r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ9r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_9",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ_10r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ_10r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_10r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_10",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ_11r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ_11r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_11r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_11",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ_12r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ_12r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_12r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_12",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ_13r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ_13r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_13r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_13",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PATGEN_SEQ_14r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PATGEN_SEQ_14r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_14r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_14",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8888, /* 34952 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_STS2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_STS2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_STS3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_STS3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_STS4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_STS4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_UC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_UC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_UC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_MICRO_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_MISC_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_MISC_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_MISC_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_MISC_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x300, /* 768 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_TXFIR_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_TXFIR_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x800, /* 2048 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc803, /* 51203 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc8ff, /* 51455 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff01, /* 65281 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa80d, /* 43021 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x27, /* 39 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7, /* 7 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa, /* 10 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_PLL_CAL_CTL_STS_DBGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_PLL_CAL_CTL_STS_DBGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL_STS_DBGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_STATUS_DBG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXC_TAP_LIMIT_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXC_TAP_LIMIT_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_TAP_LIMIT_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_TAP_LIMIT_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7ff, /* 2047 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXC_TAP_LIMIT_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXC_TAP_LIMIT_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_TAP_LIMIT_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_TAP_LIMIT_CONTROL2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x70, /* 112 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXC_TAP_PRESET_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXC_TAP_PRESET_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_TAP_PRESET_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_TAP_PRESET_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXC_DBG1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXC_DBG1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_DBG1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_DEBUG_1_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3828, /* 14376 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXC_MAX_WAIT_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXC_MAX_WAIT_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_MAX_WAIT_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_MAX_WAIT_TIMER_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1f4, /* 500 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_CL72_TXC_WAIT_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_CL72_TXC_WAIT_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_WAIT_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_WAIT_TIMER_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc8, /* 200 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_RAMWORDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_RAMWORDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_RAMWORDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_RAMWORD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_ADDRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_ADDRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_ADDRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_ADDRESS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_COMMANDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_COMMANDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMANDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_RAM_WRDATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_RAM_WRDATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_RAM_WRDATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_RAM_WRDATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_RAM_RDDATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_RAM_RDDATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_RAM_RDDATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_RAM_RDDATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_DWNLOAD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_DWNLOAD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_DWNLOAD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_DOWNLOAD_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_SFR_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_SFR_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_SFR_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_SFR_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_MDIO_UC_MAILBOX_MSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_MDIO_UC_MAILBOX_MSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_MDIO_UC_MAILBOX_MSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_MDIO_UC_MAILBOX_MSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_MDIO_UC_MAILBOX_LSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_MDIO_UC_MAILBOX_LSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_MDIO_UC_MAILBOX_LSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_MDIO_UC_MAILBOX_LSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_UC_MDIO_MAILBOX_LSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_UC_MDIO_MAILBOX_LSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_UC_MDIO_MAILBOX_LSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_UC_MDIO_MAILBOX_LSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_COMMAND2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_COMMAND2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMAND2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x80f, /* 2063 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_UC_MDIO_MAILBOX_MSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_UC_MDIO_MAILBOX_MSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_UC_MDIO_MAILBOX_MSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_UC_MDIO_MAILBOX_MSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_COMMAND3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_COMMAND3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMAND3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_COMMAND4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_COMMAND4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMAND4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_TEMPERATURE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_TEMPERATURE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_TEMPERATURE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_TEMPERATURE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_PROGRAM_RAM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_PROGRAM_RAM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_PROGRAM_RAM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_B_COM_PROGRAM_RAM_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_DATARAM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_DATARAM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_DATARAM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_B_COM_DATARAM_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_UC_IRAM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_UC_IRAM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_IRAM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_B_COM_IRAM_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MDIO_MASKDATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MDIO_MASKDATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_MASKDATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_MASKDATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MDIO_BCST_PORT_ADDRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MDIO_BCST_PORT_ADDRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_BCST_PORT_ADDRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_BRCST_PORT_ADDR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1f, /* 31 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MDIO_MMD_SELr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MDIO_MMD_SELr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_MMD_SELr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_MMD_SELECT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x404d, /* 16461 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MDIO_AERr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MDIO_AERr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_AERr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_AER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_TSCE_XGXS_MDIO_BLK_ADDRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE_XGXS
	BCMI_TSCE_XGXS_MDIO_BLK_ADDRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_BLK_ADDRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_BLK_ADDR_COM_BLK_ADDR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
#endif
};


phymod_symbols_t bcmi_tsce_xgxs_symbols = 
{
   bcmi_tsce_xgxs_syms, sizeof(bcmi_tsce_xgxs_syms)/sizeof(bcmi_tsce_xgxs_syms[0]),
#if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1
   bcmi_tsce_xgxs_fields
#else
   NULL
#endif
/* END OF SYMBOL FILE */
};

#endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */
